Performance of ALTIROC2 readout ASIC with LGADs for ATLAS HGTD picosecond MIP timing detector

The combination of 3D tracking and high-precision timing measurements has been identified by the European Committee for Future Accelerators as a fundamental requirement to increase detection capabilities for future applications. Among others, on-chip high-quality clock is a key factor determining the overall resolution of timing ASICs. However, in large and dense chips, power-grid drops can severely affect the non-deterministic jitter of the clock, representing a limit to the performances. This contribution presents a simulation framework based on commercial tools to derive power supply-induced jitter, providing a pre-silicon methodology to assess its impact to timing indeterminism. The flow is presented together with practical examples and results.

Section: Altiroc Case Studymentioning

confidence: 99%

A simulation methodology for establishing IR-drop-induced clock jitter for high precision timing ASICs

Bergamin,

Soulier

2024

“…Developing and testing interconnection of large pitch modules has been done as an alternative for solder bump bonding where additional mechanical strength is required. The ALTIROC2 ASIC [10] as well as the Low Gain Avalanche Detector (LGAD) [11] sensors produced by USTC (Hefei, China), have a pixel matrix of 15×15 pixels. The pixel pitch is 1.3 mm and the connecting area per pad is around 8000 μm 2 .…”

Section: Lgad Hybridisationmentioning

confidence: 99%

Pixel detector hybridisation and integration with anisotropic conductive adhesives

Volker,

Schmidt,

Dannheim

et al. 2024

A reliable and cost-effective interconnect technology is required for the development of hybrid pixel detectors. The interconnect technology needs to be adapted for the pitch and die sizes of the respective applications. This contribution presents recent results of a newly developed in-house single-die interconnection process based on Anisotropic Conductive Adhesives (ACA). The ACA interconnect technology replaces solder bumps with conductive micro-particles embedded in an epoxy layer applied as either film or paste. The electro-mechanical connection between the sensor and ASIC is achieved via thermocompression of the ACA using a flip-chip device bonder. The ACA technology can also be used for ASIC-PCB/FPC integration, replacing wire bonding or large-pitch solder bumping techniques. A specific pixel-pad topology is required to enable the connection via micro-particles and create cavities into which excess epoxy can flow. This pixel-pad topology is achieved with an in-house Electroless Nickel Immersion Gold (ENIG) process. The ENIG and ACA processes are qualified with a variety of different ASICs, sensors, and dedicated interconnect test structures, with pad diameters ranging from 12 μm to 140 μm and pitches between 20 μm and 1.3 mm. The produced assemblies are characterized electrically, with radioactive-source exposures, and in tests with high-momentum particle beams. This contribution introduces the developed interconnect and plating processes and showcases different hybrid assemblies produced and tested with the above-mentioned methods. A focus is placed on recent optimization of the plating and interconnect processes, resulting in an improved plating uniformity and interconnect yield.

“…The Peripheral Electronics Board (PEB), located at the outer radius of the HGTD, fulfills various functions, including control, monitoring, data transmission, power-supply distribution, and routing temperature sensors for the interlock system [2]. As the voltage converter in PEB, the BPOL12V [3] is responsible for converting an input voltage of around 11 V to an output voltage of 1.2 V or 2.5 V and supplying power to ATLAS Timing Read-Out Chip (ALTIROC) [4] and other PEB components. The operational conditions of the HGTD necessitate exposure to low temperatures, approximately −30 • C. PEB operates within a magnetic field ranging from 0.38 T to 0.43 T, with the angle of incidence falling between 57 • and 67 • [5,6].…”

Section: Introductionmentioning

confidence: 99%

HGTD DC/DC converter in low temperature and magnetic field operation

Zhai,

Zhang,

et al. 2024

The BPOL12V is a DC/DC converter designed to supply power to the High Granularity Timing Detector (HGTD) as part of the ATLAS Phase II upgrade project. The HGTD operates in an environment characterized by low temperatures and a magnetic field. Ensuring the reliable functionality of the BPOL12V under such conditions is of utmost importance. This paper outlines a series of functionality tests for the BPOL12V, including efficiency, ripple, and rise/fall edge assessments across various operational scenarios. The performance of the BPOL12V consistently meets the requirements of the HGTD, whether it operates in low temperatures down to -30 °C or in the presence of a 0.4 T magnetic field.