Performance of machines for lattice QCD simulations

Wettig, Tilo

doi:10.22323/1.020.0019

Cited by 6 publications

(8 citation statements)

References 13 publications

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“…The components of a node are integrated in what we currently call a "brick". 2 The basis of a brick is a midplane, see Fig. 2 (left).…”

Section: System Designmentioning

confidence: 99%

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QPACE 2 and Domain Decomposition on the Intel Xeon Phi

Arts¹,

Bloch²,

Georg³

et al. 2015

Proceedings of the 32nd International Symposium on Lattice Field Theory — PoS(LATTICE2014)

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“…The components of a node are integrated in what we currently call a "brick". 2 The basis of a brick is a midplane, see Fig. 2 (left).…”

Section: System Designmentioning

confidence: 99%

“…They also influenced the design of commercial supercomputers such as BlueGene. A probably incomplete list of such machines includes ACPMAPS, GF11, Fermi-256, QCDSP, QCDOC (all in the US), QCDPAX, CP-PACS, PACS-CS (Japan), as well as APE100, APEmille, apeNEXT, and QPACE 1 (Europe), see also [2] for a review.…”

Section: Introductionmentioning

confidence: 99%

QPACE 2 and Domain Decomposition on the Intel Xeon Phi

Arts¹,

Bloch²,

Georg³

et al. 2015

Proceedings of the 32nd International Symposium on Lattice Field Theory — PoS(LATTICE2014)

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“…To get a better picture, it is instructive to compare the performance of the GPU code with an equivalent code running purely on CPUs. The typical CPU dslash performance for double precision implementations is 1-2 GFlops/s [15]. Our own CPU implementation runs at 1.5 GFlops/s per core.…”

Section: Multi-gpu Dslash Implementationmentioning

confidence: 99%

Efficient Implementation of the Overlap Operator on Multi-GPUs

Alexandru

Lujan

Pelissier

et al. 2011

2011 Symposium on Application Accelerators in High-Performance Computing

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Abstract-Lattice QCD calculations were one of the first applications to show the potential of GPUs in the area of high performance computing. Our interest is to find ways to effectively use GPUs for lattice calculations using the overlap operator. The large memory footprint of these codes requires the use of multiple GPUs in parallel. In this paper we show the methods we used to implement this operator efficiently. We run our codes both on a GPU cluster and a CPU cluster with similar interconnects. We find that to match performance the CPU cluster requires 20-30 times more CPU cores than GPUs.

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“…As an example of a conventional x86 processor, a 2.4GHz Xeon system was used, along with a high performance SSE3 implementation of the Dslash operation [11,12] encapsulated in a library called intel sse wilson dslash. This is included with the Chroma library and optionally compiled in on systems which support SSE.…”

Section: Performancementioning

confidence: 99%