Performance of thin-film transistors on polysilicon films grown by low-pressure chemical vapor deposition at various pressures

Dimitriadis, C. A.; Coxon, P. A.; Dózsa, L.; Papadimitriou, L.; Economou, N. A.

doi:10.1109/16.123484

Cited by 115 publications

(38 citation statements)

References 30 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Unlike FE , V th and the subthreshold slope ͑S͒ are governed by the numbers of interface and grain trap states per unit channel area, N T , 15,16 at ⌬E ϳ 0 to − 0.3 eV, where S is governed strongly by N T near the intrinsic Fermi level ͑⌬E ϳ 0 eV͒. For fresh TFTs, the areal density of grain trap states, N G , averaged over the range ⌬E = 0 to − 0.3 eV in thick CLC poly-Si was about 4.8ϫ 10 10 cm −2 eV −1 -less than that, 5.2ϫ 10 10 cm −2 eV −1 , in thin CLC poly-Si, where N G was estimated from n GT t CLC and t CLC denotes the thickness of the CLC poly-Si.…”

mentioning

confidence: 99%

Stability of continuous-wave laser-crystallized epilike silicon transistors

Lin

Chen

Shieh

et al. 2007

Applied Physics Letters

View full text Add to dashboard Cite

Stability of high-hole-mobility thin-film transistors (TFTs) on single-grainlike silicon channels formed by continuous-wave laser crystallization during hot-carrier stressing (HCS) was studied. As channel layers become thicker, laser-mediated channel crystallinity increases, increasing channel roughness. On such epilike polycrystalline silicon substrates, the poorer interface quality for thicker channels, even those with lower tail-state densities of grain traps, is responsible for the extensive charge trapping and creation of deep-state densities in the fabricated TFTs due to HCS. Hence, on a thin channel with a thickness of 50nm and ultrasmooth surfaces, HCS hardly degrades the electrical parameters of the devices.

show abstract

mentioning

confidence: 99%

Stability of continuous-wave laser-crystallized epilike silicon transistors

Lin

Chen

Shieh

et al. 2007

Applied Physics Letters

View full text Add to dashboard Cite

show abstract

“…6, the SILC-BGPS TFT provides smaller N t than that of the MILC-BGPS TFT. Another improvement of SILC poly-Si is N it , which can be determined from SS by using the Dimitriadis model as follows [21]: …”

Section: Calculation Of Trap-state Densitiesmentioning

confidence: 99%

Progress of p-channel bottom-gate poly-Si thin-film transistor by nickel silicide seed-induced lateral crystallization

et al. 2016

View full text Add to dashboard Cite

Excimer laser annealing (ELA) is known to be the most common crystallization technology for the fabrication of low-temperature polycrystalline-silicon (poly-Si) thinfilm transistors (TFTs) in the mass production industry. This technology, however, cannot be applied to bottom-gate (BG) TFTs, which are well developed for the liquid-crystal display (LCD) back-planes, because strong laser energy of ELA can seriously damage the other layers. Here, we propose a novel high-performance BG poly-Si TFT using Ni silicide seed-induced lateral crystallization (SILC). The SILC technology renders it possible to ensure low damage in the layers, smooth surface, and longitudinal large grains in the channel. It was observed that the electrical properties exhibited a steep subthreshold slope of 110 mV/dec, high field-effect mobility of 304 cm 2 /Vsec, high I on /I off ratio of 5.9 9 10 7 , and a low threshold voltage of -3.9 V.

show abstract

“…1. The degradation of subthreshold swing S.S. is attributed to the generation of the interface trap states N it of HfO 2 /poly-Si [15][16][17][18][19], which both NBTI and PBTI could degrade the HfO 2 /polySi interface. In addition, the increase of threshold voltage |DV TH | can be attributed to not only the degradation of subthreshold swing S.S. but also the oxide charge trapping in HfO 2 [19].…”

Section: Resultsmentioning

confidence: 99%