PFCA: A Programmable FIB Caching Architecture

Grigoryan, Garegin; Liu, Yaoqing; Kwon, Minseok

doi:10.1109/tnet.2020.3001904

Cited by 10 publications

(5 citation statements)

References 24 publications

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“…By deciding which rules to be placed on which switch while respecting memory constraint and rule dependency, flow entries can be split and distributed over the network to reduce the flow table space used by a single switch [13][14]. Caching timed out flow entries in memory instead of kicking them out enables the efficient use of flow table meanwhile reducing network latency [15][16].…”

Section: Flow Table Managementmentioning

confidence: 99%

Flow Entry Timeouts Optimization over Software Defined Networks Supporting Elephant Flow Classification

Zhao¹,

Zhao²,

Liao³

et al. 2022

Journal of Internet Technology

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<p>Elephant flow (elephant) classification is significant for network performance management and resource optimization. Classifying elephants over Software Defined Networks (SDNs) often relies on statistics counted by switches and transferred to controllers, leading to a huge control channel bandwidth occupation that degrades network latency and user experience. Classifying elephants using flow packets forwarded to controllers completely avoids moving statistics from switches to controllers, but couples flow entry timeouts to elephant classification accuracy, time efficiency, flow table size, control channel bandwidth usage, and network latency. This paper aims to find the best flow entry timeouts to optimize the objectives by modeling the objectives and formulating a multi-objective optimization problem. The number of objectives is further reduced to 3 and the problem is solved by Machine Learning (ML) approaches. Extensive evaluations are made over real packet traces. To the best of our knowledge, this work is the first effort that explores all the objectives related to flow entry timeouts when using flow packets forwarded to controllers to classify elephants over SDNs.</p> <p> </p>

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Section: Flow Table Managementmentioning

confidence: 99%

Flow Entry Timeouts Optimization over Software Defined Networks Supporting Elephant Flow Classification

Zhao¹,

Zhao²,

Liao³

et al. 2022

Journal of Internet Technology

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“…Signorello et al [132] developed a preliminary implementation of Named Data Networking (NDN) instance using P4 that caches requests to optimize its operations. Grigoryan et al [133] proposed a system that caches Forwarding Information Base (FIB) entries (the most popular entries) in fast memory in order to minimize the TCAM consumption and to avoid the This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ This article has been accepted for publication in a future issue of this journal, but has not been fully edited.…”

Section: ) Application-specific Cachingmentioning

confidence: 99%

“…Signorello et al [113] developed a preliminary implementation of Named Data Networking (NDN) instance using P4. Grigoryan et al [114] proposed a system that caches Forwarding Information Base (FIB) entries (the most popular entries) in fast memory in order to minimize the TCAM consumption and to avoid the TCAM overflow problem. Zhang et al [115] proposed B-Cache, a framework that bypasses the original processing pipeline to improve the performance of caching.…”

Section: B2 Literature Reviewmentioning

confidence: 99%

An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends

2021

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Traditionally, the data plane has been designed with fixed functions to forward packets using a small set of protocols. This closed-design paradigm has limited the capability of the switches to proprietary implementations which are hard-coded by vendors, inducing a lengthy, costly, and inflexible process. Recently, data plane programmability has attracted significant attention from both the research community and the industry, permitting operators and programmers in general to run customized packet processing functions. This open-design paradigm is paving the way for an unprecedented wave of innovation and experimentation by reducing the time of designing, testing, and adopting new protocols; enabling a customized, top-down approach to develop network applications; providing granular visibility of packet events defined by the programmer; reducing complexity and enhancing resource utilization of the programmable switches; and drastically improving the performance of applications that are offloaded to the data plane. Despite the impressive advantages of programmable data plane switches and their importance in modern networks, the literature has been missing a comprehensive survey. To this end, this paper provides a background encompassing an overview of the evolution of networks from legacy to programmable, describing the essentials of programmable switches, and summarizing their advantages over Softwaredefined Networking (SDN) and legacy devices. The paper then presents a unique, comprehensive taxonomy of applications developed with P4 language; surveying, classifying, and analyzing more than 200 articles; discussing challenges and considerations; and presenting future perspectives and open research issues.

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“…An inevitable obstacle to the wildcard-match scheme is the rule dependency problem [16,20,21]. The neglect of rule dependency can lead to mistakes in packet forwarding.…”

Section: Wildcard Matchmentioning

confidence: 99%

PipeCache: High Hit Rate Rule-Caching Scheme Based on Multi-Stage Cache Tables

Yang

Yan

et al. 2020

Electronics

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OpenFlow switches hardware cannot store all the OpenFlow rules due to a limited resource. The rule-caching scheme is one of the best solutions to solve the hardware size limitation. In OpenFlow switches, Multiple Flow Tables (MFTs) provide more flexible flow control than a single table. Exact match and wildcard match are two typical matching methods. The exact match applies to a single flow table and multiple flow tables, but the performance is low under frequently changing traffic. Many commodity switches use Ternary Content Addressable Memory (TCAM) to support fast wildcard lookups. Earlier works on wildcard-match rule-caching focus on the dependency problem caused by the overlaps of match fields. Their designs cannot handle the rule-caching problem of MFTs because they are based on a single flow table, instead of the widely used MFTs structure. So, we propose a new design named PipeCache that solves the problem of MFTs rule-caching scheme based on wildcard-match. In our design, we logically split the TCAM resources, and assign them to each flow table according to the size of each flow table. Each flow table will cache the selected rules into their assigned TCAM resources and be updated in time by our algorithms to make the most use of the limited TCAM resources. We compare our structure with the exact-match scheme and the wildcard-match scheme based on a single flow table under different cache sizes and traffic localities. Experiment results show that our design PipeCache improves cache hit rate by up to 18.2% compared to the exact-match scheme and by up to 21.2% compared to the wildcard-match scheme based on a single flow table.

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PFCA: A Programmable FIB Caching Architecture

Cited by 10 publications

References 24 publications

Flow Entry Timeouts Optimization over Software Defined Networks Supporting Elephant Flow Classification

Flow Entry Timeouts Optimization over Software Defined Networks Supporting Elephant Flow Classification

An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends

PipeCache: High Hit Rate Rule-Caching Scheme Based on Multi-Stage Cache Tables

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