Phase noise performance of analog frequency dividers

Abstract

The phase noise performance obtainable using silicon and GaAs-based TTL (transistor-transistor logic) and ECL (emitter-coupled logic) logic level digital frequency dividers is discussed. Measurement of the spectral performance of two types of analog dividers is reported: a parametric divider using varactor diodes and a regenerative-type divider incorporating a double-balanced mixer in the oscillator feedback circuit. Both dividers were configured for divide-by-two operation at VHF. Evaluation indicates the regenerative divider is capable of providing much lower phase noise than conventional digital logic level devices. The regenerative divider can be successfully operated over bandwidths in excess of an octave, and the design lends itself to small (i.e. TO-8) modular package implementation. Operating frequencies are bounded only by the range of the mixer and RF amplifier utilized and, as such, should extend from HF through microwave.

Frequency division using a micromechanical resonance cascade

“…Frequency conversion mechanisms are essential elements in frequency synthesizers [13,7]. Frequency synthesizers, which generate a range of signals from a single stable input signal, are used in many applications, ranging from microwave and RF transceivers to wireless applications to vibration energy harvesters [7,8,9,10].…”

“…In most systems requiring frequency conversion, electronic frequency converters are used [13,6]. Solid-state devices have dominated this field due to wide bandwidth operation and ease of implementation.…”

“…Solid-state devices have dominated this field due to wide bandwidth operation and ease of implementation. In [13], two types of GaAsbased frequency dividers with divide-by-two operation are presented: a parametric divider and a regenerative type divider, which can generally operate over a wider range of frequencies and drive levels. Regenerative dividers, also referred to as Miller dividers, can be used to divide a signal by N +1 where N is an integer, and generally show better phase noise characteristics than traditional digital dividers [16].…”

“…There are several demonstrations of cascading conversion stages, but they generally require amplifiers and buffers for cascading conversion stages [13,19,20] and preventing back-coupling [21,22]. Input phase noise variations in a phase-locked loop are multiplied by N at the ouput, so a frequency divider actually increases noise by 20 log(N ) [6].…”

Variable-ratio digital frequency dividers: Analogue design methodology and phase noise analysis based on harmonic balance

“…Phase noise analysis of digital frequency dividers has been previously formulated at a system level as a single block, from a time-domain jitter perspective [14]. On the other hand, different approaches for phase noise analysis of analogue frequency dividers can be found in the literature [5,26,27]. Phase noise simulation of synchronized frequency dividers can be interpreted as the extension of the procedure used for oscillators.…”