Photodiode with low dark current built in silicon-on-insulator using electrostatic doping

Liu, J.; Zhu, Keyu; Zaslavsky, Alexander; Cristoloveanu, S.; Arsalan, Muhammad; Wan, Jing

doi:10.1016/j.sse.2019.107733

Cited by 10 publications

(4 citation statements)

References 17 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…To avoid the damage of the ultrathin Si layer and the related high dark current, Liu et al, have demonstrated a lateral PIN diode with field‐induced doping. [ 22 ] The P‐ and N‐type regions in the film are formed by electrostatic doping, induced by the top and bottom gates, without any implantation and high‐temperature annealing steps, as schematically shown in Figure a. The original film is undoped, but a negative backgate voltage of −2 V creates a population of holes.…”

Section: The Pin Photodiode On Soimentioning

confidence: 99%

See 1 more Smart Citation

A Review on the Recent Progress of Silicon‐on‐Insulator‐Based Photodetectors

Liu

Cristoloveanu

Wan

2021

Physica Status Solidi (a)

View full text Add to dashboard Cite

The family of photodetectors plays an important role in multiple applications. Extensive research and continuous development of photodetectors has enriched their functionalities and improved their performances. The silicon-on-insulator (SOI) technology extends the concepts and merits of photodetectors. Herein, the recent progress of the SOI-based photodetectors is reviewed from the viewpoint of operation principles and performances. Silicon and Germanium photodiodes with conventional PIN structure are discussed first. Photodetectors with novel operating mechanism and high internal gain are then presented: avalanche photodiode on SOI, innovative photo-Z 2 -field effect transistor (FET), and devices based on interface coupling. Superior functionalities, such as wavelength detection, dynamically tunable responsivity and response spectrum, are demonstrated. At last, the technology of active pixel sensors on SOI is reviewed.

show abstract

Section: The Pin Photodiode On Soimentioning

confidence: 99%

mentioning

confidence: 99%

A Review on the Recent Progress of Silicon‐on‐Insulator‐Based Photodetectors

Liu

Cristoloveanu

Wan

2021

Physica Status Solidi (a)

View full text Add to dashboard Cite

show abstract

“…The detection wavelength range is tailored by adjusting the periodicity of the superlattice in the absorbing layer. However, integrating III-V materials with other substances presents challenges due to lattice mismatch, leading to the formation of dislocations that significantly degrade device performance [5][6][7]. Consequently, the materials employed in such detectors require specialized epitaxial techniques or additional electronic components for integration with silicon ICs, thereby complicating the direct realization of miniaturized smart devices and limiting their suitability to conventional applications.…”

Section: Introductionmentioning

confidence: 99%

“…Based on mature silicon-based processing technology, the material selection for siliconbased photodetectors has greatly benefited from p-type or n-type doping. The p-i-n type silicon photodetectors [5][6][7] are widely used for visible light applications, including optical imaging and spectroscopic analysis. Additionally, metal-silicon and metal-oxide-silicon photodiodes offer improved electrical properties.…”

Section: Introductionmentioning

confidence: 99%

Overcoming the Fermi-Level Pinning Effect in the Nanoscale Metal and Silicon Interface

Lin

2023

Nanomaterials

View full text Add to dashboard Cite

Silicon-based photodetectors are attractive as low-cost and environmentally friendly optical sensors. Also, their compatibility with complementary metal-oxide-semiconductor (CMOS) technology is advantageous for the development of silicon photonics systems. However, extending optical responsivity of silicon-based photodetectors to the mid-infrared (mid-IR) wavelength range remains challenging. In developing mid-IR infrared Schottky detectors, nanoscale metals are critical. Nonetheless, one key factor is the Fermi-level pinning effect at the metal/silicon interface and the presence of metal-induced gap states (MIGS). Here, we demonstrate the utilization of the passivated surface layer on semiconductor materials as an insulating material in metal-insulator-semiconductor (MIS) contacts to mitigate the Fermi-level pinning effect. The removal of Fermi-level pinning effectively reduces the Schottky barrier height by 12.5% to 16%. The demonstrated devices exhibit a high responsivity of up to 234 μA/W at a wavelength of 2 μm, 48.2 μA/W at 3 μm, and 1.75 μA/W at 6 μm. The corresponding detectivities at 2 and 3 μm are 1.17 × 108 cm Hz1/2 W−1 and 2.41 × 107 cm Hz1/2 W−1, respectively. The expanded sensing wavelength range contributes to the application development of future silicon photonics integration platforms.

show abstract