Photonic curvilinear data processing

Browning, Clyde; Quaglio, Thomas; Figueiro, Thiago; Pauliac, S.; Belledent, Jerome; Fay, Aurélien; Bustos, J.; Marusic, Jean-Christophe; Schiavone, Patrick

doi:10.1117/12.2069335

Cited by 2 publications

(2 citation statements)

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“…During the fracturing phase, where the flattened layout data is converted into writing patterns for the photomask (or direct e‐beam writer) the polygon data is again converted, depending on the writing strategy and the original data format. This can again introduce discretisation and staircasing . Customized writing strategies can reduce these effects, but today they always start from polygon data that is already an approximation of the intended design.…”

Section: Opportunitiesmentioning

confidence: 99%

Silicon Photonics Circuit Design: Methods, Tools and Challenges

Bogaerts

Chrostowski

2018

Laser & Photonics Reviews

437

230

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Silicon Photonics technology is rapidly maturing as a platform for larger‐scale photonic circuits. As a result, the associated design methodologies are also evolving from component‐oriented design to a more circuit‐oriented design flow, that makes abstraction from the very detailed geometry and enables design on a larger scale. In this paper, the state of this emerging photonic circuit design flow and its synergies with electronic design automation (EDA) are reviewed. The design flow from schematic capture, circuit simulation, layout and verification is covered. The similarities and the differences between photonic and electronic design, and the challenges and opportunities that present themselves in the new photonic design landscape, such as variability analysis, photonic‐electronic co‐simulation and compact model definition are discussed.

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Section: Opportunitiesmentioning

confidence: 99%

Silicon Photonics Circuit Design: Methods, Tools and Challenges

Bogaerts

Chrostowski

2018

Laser & Photonics Reviews

437

230

View full text Add to dashboard Cite

show abstract

“…Lines 18-29 initialize a variety of variables used to create the arrayed structures. The nested for loop (lines [31][32][33][34][35][36][37][38][39][40] iterates through diameters and separations between circular array elements. In the inner loop, a pitch is calculated in line 33.…”

Section: Labeled Arraysmentioning

confidence: 99%

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et al. 2016

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Photonic curvilinear data processing

Cited by 2 publications

References 4 publications

Silicon Photonics Circuit Design: Methods, Tools and Challenges

Silicon Photonics Circuit Design: Methods, Tools and Challenges

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