2019
DOI: 10.1038/s41928-019-0226-1
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Photonic devices compute in memory

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Cited by 4 publications
(5 citation statements)
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“…Certainly, demand for machine intelligence and AI has skyrocketed and is continuing to do so for the foreseeable future. All this information processing demands more memory performance, especially in emerging non-van Neumann systems such as neural networks or tensor-core processors [1][2][3] .…”
Section: Introductionmentioning
confidence: 99%
“…Certainly, demand for machine intelligence and AI has skyrocketed and is continuing to do so for the foreseeable future. All this information processing demands more memory performance, especially in emerging non-van Neumann systems such as neural networks or tensor-core processors [1][2][3] .…”
Section: Introductionmentioning
confidence: 99%
“…Thus, researchers are seeking alternatives to the conventional von Neumann architecture, in which computations can be performed using computing units that are not physically separate from memory units; such technology is termed in-memory computing. [22][23][24][25][26][27][28][29][30][31] However, technologies that are more tangible and plausible and capable of surpassing the computing performance of the conventional von Neumann architecture are also available; these technologies can serve as a platform for increasing the information density per given unit device using ternary, quaternary, or even higher multivalued logic (MVL) systems. [15][16][32][33][34] Current processing systems are based on the binary system, wherein information is stored as a "0" bit or a "1" bit; in contrast, the MVL system functions as a ternary, quaternary, or even higher-valued system, which enables significant reductions in the number of devices and the overall system complexity.…”
Section: Introductionmentioning
confidence: 99%
“…[ 5 ] The scaling down of MOSFET has been challenging as the power management of IC strongly influences the production price and reliability. Currently, various breakthroughs have been suggested to resolve the limitation in scaling down conventional MOSFETs, such as increasing the data density in a unit area (such as multilevel logic, [ 6–11 ] memory computing, [ 12–15 ] and other area‐efficient method [ 16–18 ] ) and improving in device architecture (such as FinFET, [ 19–22 ] gate‐all‐around (GAA) FET, [ 22–28 ] tunneling field‐effect transistor (TFET) [ 22,29–31 ] ).…”
Section: Introductionmentioning
confidence: 99%
“…[5] The scaling down of MOSFET has been challenging as the power management of IC strongly influences the production price and reliability. Currently, various breakthroughs have been suggested to resolve the limitation in scaling down conventional MOSFETs, such as increasing the data density in a unit area (such as multilevel logic, [6][7][8][9][10][11] memory computing, [12][13][14][15] and other area-efficient method [16][17][18] ) and improving in device architecture (such as FinFET, [19][20][21][22] gateall-around (GAA) FET, [22][23][24][25][26][27][28] tunneling field-effect transistor (TFET) [22,[29][30][31] ). Band-to-band tunneling (BTBT), which is the main mechanism to operate TFET, is one of the promising alternative architectures for conventional MOSFET to solve the power consumption issue.…”
mentioning
confidence: 99%