Physical Description of the Mixed-Mode Degradation Mechanism for High Performance Bipolar Transistors

Temperature Stability and Reliability Aspects of 77 GHz Voltage Controlled Oscillators in a SiGe:C BiCMOS Technology

“…This behavior can be explained by comparing the corresponding junction temperatures T j ≈ T a + R TH |V CE I E | With a measured thermal resistance R TH = 1240 K/W one gets T j = 326 K for I E = -23 mA compared to T j = 245 K for I E = -3 mA. Since the energy of the accelerated carriers is significantly reduced by phonon scattering less device degradation is expected for higher junction temperature [7]. Therefore, the reduced degradation can be explained by the higher junction temperature.…”

“…It could be shown that the concentration of accelerated holes is highest in the neutral base near the emitter-base oxide spacer leading to oxide defects and accordingly to enhanced base recombination current [7].…”

“…eventually lead to central current crowding and bias instabilities ("pinch-in") defining the maximum available V CB . Additionally, the inserted oscillator load line indicates the switch between high current and high voltage transistor states during oscillator operation at standard operation supply voltage V CC = 5.5 V. Based on the above oscillator load line two main stress regimes were chosen: forward stress with very high emitter current density (10 mA/emitter) and high temperature (125°C) and mixed-mode stress with sufficient high V CB , moderate emitter current, and temperatures from room temperature down to -40°C where mixed-mode stress degradation is expected to be most pronounced [7]. The mixed-mode stress conditions are somewhat relaxed compared to the conditions in [4,5] but as indicated with the circles in Fig.…”

“…Whereas other papers [3]- [7] investigate general aspects of the dc reliability of SiGe:C HBTs, here HBT degradation is studied under such stress conditions which emulate the switching behavior of the VCO load line. However, we did not only study the degradation of the collector and base currents during stress.…”

5. Reliability

“…The damage spectrum depends on the accelerating factors J E,stress and V CB,stress for multiple reasons: first, they determine the II rate, but also the device temperature (high temperatures can have a beneficial impact in terms of damage recovery); moreover, they can trigger high-current (Kirk effect) or high-voltage (pinch-in effect) phenomena [Che07]. The trap creation at the emitter-base spacer (attributed to hot holes [Van06,Kam17b]) can be monitored by measuring the forward V CB = 0 V Gummel plot, where an SRH-induced growth in the low-V BE base current is observed; the reverse V EB = 0 V Gummel plot is instead used to measure the damage due to HCs hitting the ST interface, since it causes an increase in the reverse-mode base current [Zha02,Zhu05,Che07,Moe12,Cha15].…”