Physical DFT for High Coverage of Realistic Faults

Saraiva, M.; Casimiro, P.; Santos, M.B.; Sousa, J.; Gonçalves, Fernando M.; Teixeira, I.C.; Teixeira, J.P.

doi:10.1109/test.1992.527885

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Cited by 24 publications

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“…Similar to [25], defect statistics analysis is used to evaluate the probability P(f j ) = p j of occurrence of each fault, f j . This methodology, together with a set of tools, previously was used to investigate the testability of digital circuits by analysing the estimated testability of realistic faults according to the fault topology [23]. In this work, the fault extraction procedure is used to identify (and rank) the most likely realistic faults in analogue integrated circuits.…”

Section: State-of-the-artmentioning

confidence: 99%