Physical Insight into Thermal Behaviour of Power DMOSFET and IGBT: A Two-Dimensional Computer Simulation Study

Abstract

To acquire a physical understanding of the influence of temperature on the electrical characteristics of power DMOSFET (double-diffused metal-oxide-semiconductor field effect transistor) and IGBT (insulated gate bipolar transistor), and to understand their failure mechanisms, a comprehensive thermal characterization of DMOSFET and IGBT unit cells of various structural parameters and impurity diffusion profiles has been carried out as a function of lattice temperature, encompassing the broad temperature range from 200 to 600 K. Device electrical characteristics have been generated in the steady-state forward conduction, blocking and transfer modes of operation using the computer program ISE-TCAD tools and incorporating the relevant temperature-dependent physical models of carrier transport properties and recombination mechanisms during the analysis. This computer-aided analysis has revealed that at a given temperature, within their respective operating ranges, for a particular forward voltage, the IGBT cell always yielded a much higher current than its DMOSFET cell counterpart. DMOSFET behaviour has been found to be maintained from 200 to 450 K with changes in terminal electrical parameters like ON-resistance, transconductance, saturated drain current, threshold voltage, blocking voltage and leakage current. On the contrary, IGBT cells have shown to be capable of working up to 600 K, much higher than and in striking dissimilarity to the DMOSFET cells. Unlike the DMOSFET cell characteristic, the IGBT cell forward characteristics did not fail completely with temperature. Their partial failure has been observed as a more rapid increase in current at a given voltage so that the curve for higher temperature intersected the one at lower temperature. The current density of failure has been found to decrease with increasing temperature. This was ascribed to latching of the parasitic bipolar thyristor. In addition, a moderate variation of IGBT cell forward characteristics with temperature has been observed, distinguishing them from DMOS-FET cells. Further, the transfer characteristic of the IGBT cell has not exhibited collector current saturation at high gate voltages. This saturation behaviour was a notable feature of the DMOSFET cell with the current saturation level depending on temperature. The simulated results have been interpreted in terms of the physics of device operation by invoking the power DMOSFET ON-resistance model, and combinational bipolar transistor-DMOSFET model of the IGBT. Physical explanation of the higher operating temperature capability of IGBT involves the simultaneous action of oppositely-directed thermally varying forward voltage drops in the p-i-n rectifier and the DMOSFET. The simulation study has also established that a distinct correlation of the maximum safe operating temperature with device structural and profile design parameters was possible for the IGBT but was not so apparent for the DMOSFET, making it an inherent device property. Controllability of latching current density and hence pe...

Small-sized silicon-on-insulator lateral insulated gate bipolar transistor for larger forward bias safe operating area and lower turnoff energy

“…A wide forward bias safe operating area (FBSOA) of the LIGBT is desirable for all kinds of applications because the device must withstand simultaneous application of a high voltage with high current density for a duration of time. Consequently, various approaches have been reported to widen the FBSOA [4][5][6][7][8][9][10][11]. For the deep-oxide trench SOI-LIGBT (DT SOI-LIGBT) [12], the oxide trench applied in the drift region as an 'electric field line absorber' can reduce the cell pitch [13][14][15][16] to approximately one half of the conventional device structure.…”

A physically based thermal model for high‐voltage thin‐film SOI LDMOS in short circuit operation

“…Furthermore, the model also provides a physically based explanation of the temperature peak location at any drain bias. Indeed, the heat generation in SOI LDMOS structures including VLD doping profiles along the drift region has been scarcely analysed in previous work [3] in comparison with other power devices [4]. Unlike in uniform doping drift LDMOS transistors [5,6], the experimental temperature measurements [3] show a maximum value close to the body region at any gate bias and linear region; i.e, at low drain bias.…”