Physically Addressed Queueing (PAQ): Improving parallelism in Solid State Disks

Jung, Peter; Wilson, F. F.; Kandemir,

doi:10.1109/isca.2012.6237035

Cited by 21 publications

(32 citation statements)

References 20 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…All of our experiments utilize our NANDFlashSim simulation framework, described in detail in [14], which enables highly accurate timing models for the NVM types we examine. Further, we utilize queuing optimizations within NANDFlashSim as discussed in [15], to refine our findings for future NVM devices. Last, we extended NANDFlashSim to handle TLC and PCM.…”

Section: Experimental Configurationmentioning

confidence: 93%

Exploring the Future of Out-of-Core Computing with Compute-Local Non-Volatile Memory

Wilson

Choi

Shalf

et al. 2014

Scientific Programming

Self Cite

View full text Add to dashboard Cite

Abstract. Drawing parallels to the rise of general purpose graphical processing units (GPGPUs) as accelerators for specific high-performance computing (HPC) workloads, there is a rise in the use of non-volatile memory (NVM) as accelerators for I/O-intensive scientific applications. However, existing works have explored use of NVM within dedicated I/O nodes, which are distant from the compute nodes that actually need such acceleration. As NVM bandwidth begins to out-pace point-to-point network capacity, we argue for the need to break from the archetype of completely separated storage.Therefore, in this work we investigate co-location of NVM and compute by varying I/O interfaces, file systems, types of NVM, and both current and future SSD architectures, uncovering numerous bottlenecks implicit in these various levels in the I/O stack. We present novel hardware and software solutions, including the new Unified File System (UFS), to enable fuller utilization of the new compute-local NVM storage. Our experimental evaluation, which employs a real-world Out-of-Core (OoC) HPC application, demonstrates throughput increases in excess of an order of magnitude over current approaches.

show abstract

Section: Experimental Configurationmentioning

confidence: 93%

Exploring the Future of Out-of-Core Computing with Compute-Local Non-Volatile Memory

Wilson

Choi

Shalf

et al. 2014

Scientific Programming

Self Cite

View full text Add to dashboard Cite

show abstract

“…According to the parallelism among dies, chips, and channels [17], [19], [20], [24], the operations in one die can imply operations in other dies including those on different chips.…”

Section: Design Of Rb-explorermentioning

confidence: 99%

RB-Explorer: An Accurate and Practical Approach to Write Amplification Measurement for SSDs

Sun

Qin

Jiang

et al. 2015

IEEE Trans. Comput.

View full text Add to dashboard Cite

Abstract-A large write amplification ratio degrades the program/erase cycles (P/Es) of NAND Flashes and reduces the endurance and performance of solid state disks (SSDs). The lack of a practical way to measure write amplification for SSDs motivates us to propose a novel measuring method called RB-Explorer at the SSD level rather than the NAND Flash level. The goal of RB-Explorer is two-fold: (1) to accurately measure the write amplification of SSDs to quantify SSD endurance and (2) to study the impacts of I/O techniques on write amplification of SSDs. RB-Explorer incorporates a Ready/Busy (R/B) signal of one of the NAND Flashes in an SSD in a proposed write amplification model for SSDs with four full-parallelism levels (i.e., the channel, chip, die, and plane levels). RBExplorer takes two steps toward measuring write amplification. First, RB-Explorer quantifies the number of page programs using the low R/B signal level, the duration of which varies with the different operation (i.e., read, program, and erase) in NAND Flash. Second, RB-Explorer measures data volume written to NAND Flashes by considering parallelisms at four levels. Data volume written to a die in a NAND Flash is obtained as a product of the number N p of programs and page size P a . Given the number N channel of channels, the number N chip of chips per channel, and the number N die of dies per chip, one can obtain the data volume written to NAND Flashes as a product of N p ; P a ; N die ; N chip , and N channel . RB-Explorer is applied to analyzing write amplification ratios of SSDs to track SSD endurance. Furthermore, we implement a real-world SSD (i.e., SSD-v) and employ a fine-tuned SSD simulator (i.e., SSDsim) to validate the accuracy of RB-Explorer. Our experimental results show that RB-Explorer improves on the accuracy of SSDsim-the state-of-the-art SSD simulator-in most tested cases. We conduct a series of measurements using micro-benchmarks and I/O traces to demonstrate how RB-Explorer may be applied to investigate SSDs.

show abstract

“…In addition, [25,17] proposed different page allocation strategies to take advantage of the internal parallelism on writes. There exists a scheduler [23] that explicitly handles I/Os by avoiding resource conflicts, thereby improving the degree of parallelism. FlashVM [38] is a flash virtual memory to reap the benefits of random read performance superiority of SSDs, and Facebook flashcache [28] is a read cache leveraging read performance superiority of SSDs to improve MySQL.…”

Section: Related Workmentioning

confidence: 99%

Revisiting widely held SSD expectations and rethinking system-level implications

Jung

Kandemir

2013

Proceedings of the ACM SIGMETRICS/international Conference on Measurement and Modeling of Computer Systems

Self Cite

View full text Add to dashboard Cite

Storage applications leveraging Solid State Disk (SSD) technology are being widely deployed in diverse computing systems. These applications accelerate system performance by exploiting several SSD-specific characteristics. However, modern SSDs have undergone a dramatic technology and architecture shift in the past few years, which makes widely held assumptions and expectations regarding them highly questionable. The main goal of this paper is to question popular assumptions and expectations regarding SSDs through an extensive experimental analysis using 6 state-of-the-art SSDs from different vendors. Our analysis leads to several conclusions which are either not reported in prior SSD literature, or contradict to current conceptions. For example, we found that SSDs are not biased toward read-intensive workloads in terms of performance and reliability. Specifically, random read performance of SSDs is worse than their sequential and random write performance by 40% and 39% on average, and more importantly, the performance of sequential reads gets significantly worse over time. Further, we found that reads can shorten SSD lifetime more than writes, which is very unfortunate, given the fact that many existing systems/platforms already employ SSDs as read caches or in applications that are highly read intensive. We also performed a comprehensive study to understand the worstcase performance characteristics of our SSDs, and investigated the viability of recently proposed enhancements that are geared towards alleviating the worst-case performance challenges, such as TRIM commands and background-tasks. Lastly, we uncover the overheads brought by these enhancements and their limits, and discuss system-level implications.

show abstract

Physically Addressed Queueing (PAQ): Improving parallelism in Solid State Disks

Cited by 21 publications

References 20 publications

Exploring the Future of Out-of-Core Computing with Compute-Local Non-Volatile Memory

Exploring the Future of Out-of-Core Computing with Compute-Local Non-Volatile Memory

RB-Explorer: An Accurate and Practical Approach to Write Amplification Measurement for SSDs

Revisiting widely held SSD expectations and rethinking system-level implications

Contact Info

Product

Resources

About