Physics and compact modeling of SOI substrates with buried ground plane (GPSOI) for substrate noise suppression

Abstract

The physical mechanisms responsible for superior cross-talk suppression are identified in a new class of silicon-on-insulator substrate (GPSOI) that incorporates a buried metallic ground plane below the active silicon and buried oxide layers. It has been shown 111 that this technology exhibits a factor of ten reduction in cross-talk power between components through the substrate compared to existing state-of-the-art silicon-based substrates using standard s,, magnitude measurements in a microwave coplanar transmission test structure. The dominant crosstalk mechanisms are identified and compared to other existing cross-talk suppression technologies using numerical electro-magnetic simulations and lumped element compact model development.

Electrical characterization of SOI substrates incorporating WSi/sub x/ ground planes

“…Wafer bonding technology was used in the production of these SOI substrates. This technology together with the crosstalk measurement techniques and results have been reported previously over the frequency range 0.5-50 GHz [3]- [5]. The results show a 20-dB superior performance to any other crosstalk suppression strategy.…”

“…The effective buried insulator is therefore a composite layer consisting in this case of a thermal oxide 100 nm thick and the polysilicon layer 100 nm thick. Substrates of this type have been used in the GPSOI crosstalk characterization [3]- [5].…”

Ultralow Silicon Substrate Noise Crosstalk Using Metal Faraday Cages in an SOI Technology

“…The buried metal silicide ground plane can act as both an electrical ground plane as well as a means to extract heat from overlying circuitry [9]. The ability of the ground plane alone to suppress substrate noise has been investigated [4], [10] without the presence of the active silicon layer (i.e., test structures built directly on the buried oxide over the ground plane). The presence of a ground plane in a full SOI structure (i.e., including the active silicon layer) affords the possibility of incorporating a complete Faraday cage structure consisting of solid metal around noisy circuitry to prevent such circuitry from interfering with sensitive analog circuitry on the same die.…”