Planar fault-tolerant quantum cellular automata full adder

Abstract

In ‘More-than-Moore’ technological trends, designing new devices with quantum dot nanostructure has become an emerging domain of research. Quantum dot cellular automata are one of the major paradigm shifts in the field of nanoscale computing. Quantum cellular automata (QCA) are possible alternatives to technology based on complementary metal-oxide semiconductors (CMOS) due to their ultralow power and high speed of operation up to terahertz frequency. Furthermore, QCA technology takes up a smaller area than CMOS and is based on the charge confinement protocol, rather than the charge dissipation protocol. A planar design of a QCA-based full-adder circuit has been designed in this study. The proposed full adder is achieved with a delay of only 0·25 clock cycles, which is remarkably shorter than that for available designs. The functionality of the proposed full adder is verified using the QCA Designer software tool. Further, the defect analysis of the circuit confirms the robustness of the design. Moreover, the proposed QCA design is highly fault tolerant, which is proved by the stuck-at-fault analysis performed on the device.