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ABSTRACTThis project demonstrates the use of SIMPL-2 (SIMulated Profiles from the Layout) and SIMPL-DIX (Design interface with X windows) as an interface to other process and device simulators. An interface to RACPLE for analyzing topography dependent parasitic resistances and capacitances is implemented. Enhancements to SIMPL to call the non-planar etch simulation capabilities of SAMPLE are also presented. These integrated CAD tools are applied to a patterned photoresist planarization process, and to VLSI Hopfield neural networks. It is found that the patterned photoresist planarization process shows a relatively high tolerance to reasonable misalignments. VLSI neural networks show significant topography dependent RC parasitic delays which increase as the square of the number of neurons. Based on experience gained as a result of this work, several suggestions for the future of SIMPL are offered.
ABSTRACTThis project demonstrates the use of SIMPL-2 (SIMulated Profiles from the Layout) and SIMPL-DIX (Design interface with X windows) as an interface to other process and device simulators. Ari interface to RACPLE for analyzing topography dependent parasitic resistances and capacitances is implemented. Enhancements to SIMPL to call the non-planar etch simulation capabilities of SAMPLE are also presented. These integrated CAD tools are applied to a patterned photoresist planarization process, and to VLSI Hopfield neural networks. It is found that the patterned photoresist planarization process shows a relatively high tolerance to reasonable misalignments. VLSI neural networks show significant topography dependent RC parasitic delays which increase as the square of the number of neurons. Based on experience gained as a result of this work, several suggestions for the future of SIMPL are offered. December 19, 1988 Dedicated to my family wilh thanks for lheir continued love and support throughout my education.Acknowledgements I have been fortunate to have the support of many people in...