Plasma charging damage on ultrathin gate oxides

Park, Donggun; Hu, Chenming

doi:10.1109/55.650333

Cited by 34 publications

(5 citation statements)

References 8 publications

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“…Recent advancements in plasma processing for the gate electrode, sidewall, and high-aspect (more than 10) contact hole have highlighted the importance of fully understanding how the plasma induces damage and how to control this damage. The damage is classified on the basis of its mechanism as charging damage, [1][2][3][4] physical damage, [5][6][7][8][9][10][11][12] and ultraviolet/ vacuum-ultraviolet (UV/VUV) radiation damage [13][14][15][16] during plasma etching. Physical damage to the Si, SiO 2 , and Si 3 N 4 layers, which is considered to be caused by ion bombardment, has been the particular focus of extensive research.…”

Section: Introductionmentioning

confidence: 99%

Numerical Simulation Method for Plasma-Induced Damage Profile in SiO₂ Etching

Kuboi¹,

Tatsumi²,

Kobayashi³

et al. 2011

Jpn. J. Appl. Phys.

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We developed a numerical simulation method for the depth profiles of plasma-induced physical damage to SiO2 and Si layers during fluorocarbon plasma etching. In the proposed method, the surface layer is assumed to consist of two layers: a C–F polymer layer and a reactive layer. Physical and chemical reactions in the reactive layer divided into several thin slabs and in the deposited C–F polymer layer, which depend on etching parameters, such as etching time, gas flow rate, gas pressure, and ion energy (V pp), are considered in detail. We used our simulation method to calculate the SiO2 etch rate, the thickness of the C–F polymer layer (T C–F), and the selectivity of SiO2 to Si during C4F8/O2/Ar plasma etching. We confirmed that the calculated absolute values and their behavior are consistent with experimental data. We also successfully predicted depth profiles of physical damage to the Si and SiO2 layers introducing our re-gridding method. We found that much Si damage is generated in the pre- and early stages of the overetching step of SiO2/Si layer etching despite the high selectivity. These simulation results suggest that the T C–F value and the overetching time must be carefully controlled by process parameters to reduce damage during fluorocarbon plasma etching. The results have also provided us with useful knowledge for controlling the etching process.

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Section: Introductionmentioning

confidence: 99%

Numerical Simulation Method for Plasma-Induced Damage Profile in SiO₂ Etching

Kuboi¹,

Tatsumi²,

Kobayashi³

et al. 2011

Jpn. J. Appl. Phys.

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“…PID occurs at a gate oxide thickness less than 11.6 nm. 31,32) Charge can pass through a smaller gate oxide thickness if a high electric field is applied to the BOX layer. A flash memory with a gate oxide thickness less than 10 nm also uses quantum tunneling by applying a high electric field.…”

Section: Initial Frequencymentioning

confidence: 99%

Initial and long-term frequency degradation of ring oscillators caused by plasma-induced damage in 65 nm bulk and fully depleted silicon-on-insulator processes

Kishida¹,

Oshima

Yabuuchi

et al. 2015

Jpn. J. Appl. Phys.

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The degradation of reliability caused by plasma-induced damage (PID) has become a significant concern with the miniaturization of device size. In particular, it is difficult to relieve PID in silicon-on-insulator (SOI) because it contains buried oxide (BOX) layers. In this work, we compare PID between a bulk and a silicon on thin BOX (SOTB), which has BOX layers of less than 10 nm. We measure frequencies of ring oscillators with an antenna structure on a single stage. In the bulk, PID is relieved by first connecting an antenna to a drain because electric charge flows to a substrate. The difference in initial frequency is 0.79% between structures, which cause and relieve PID. SOTB also relieves the same amount of PID. Initial frequencies are affected by PID, but there is no effect of PID on the long-term degradation mainly caused by bias temperature instability (BTI).

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“…Therefore, the main reason for the degradation of the gate oxide film is speculated to be charging damage. Many studies of charging damage of gate oxide film by plasma processing have been done, [5][6][7] but in this experiment the origin of charging is not plasma processing.…”

Section: Tddb Characteristics Of Mos Capacitorsmentioning

confidence: 99%

Fabrication of Spin-Coated Optical Waveguides for Optically Interconnected LSI and Influence of Fabrication Process on Underlying Metal–Oxide–Semiconductor Capacitors

Tabei¹,

Maeda

Yokoyama³

et al. 2006

jjap

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A microscopic optical waveguide fabrication technique on silicon substrates at low temperatures using a fluorinated polyimide (FPI) is developed for application in an optically interconnected LSI. Propagation loss decreases to about 1.0 dB/cm in the miniaturized FPI waveguide with a core size of 1.5×10 µm2 made on a thermal oxide film and to about 4.8 dB/cm in a waveguide with a core size of 1×10 µm2 made on spin-on-glass. Furthermore, the FPI waveguides are also fabricated on metal–oxide–semiconductor (MOS) capacitors, and the influence of the waveguide fabrication including a plasma etching process on the underlying MOS capacitors is evaluated by examining the time-dependent dielectric breakdown characteristics. It is observed that plasma damage in the dry etching process may not be so large, but the damage at the spin-coating step for spin-on-glass for clad layer formation on a MOS capacitor is relatively large in the FPI waveguide fabrication process.

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Plasma charging damage on ultrathin gate oxides

Cited by 34 publications

References 8 publications

Numerical Simulation Method for Plasma-Induced Damage Profile in SiO₂ Etching

Numerical Simulation Method for Plasma-Induced Damage Profile in SiO₂ Etching

Initial and long-term frequency degradation of ring oscillators caused by plasma-induced damage in 65 nm bulk and fully depleted silicon-on-insulator processes

Fabrication of Spin-Coated Optical Waveguides for Optically Interconnected LSI and Influence of Fabrication Process on Underlying Metal–Oxide–Semiconductor Capacitors

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Plasma charging damage on ultrathin gate oxides

Cited by 34 publications

References 8 publications

Numerical Simulation Method for Plasma-Induced Damage Profile in SiO2 Etching

Numerical Simulation Method for Plasma-Induced Damage Profile in SiO2 Etching

Initial and long-term frequency degradation of ring oscillators caused by plasma-induced damage in 65 nm bulk and fully depleted silicon-on-insulator processes

Fabrication of Spin-Coated Optical Waveguides for Optically Interconnected LSI and Influence of Fabrication Process on Underlying Metal–Oxide–Semiconductor Capacitors

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Numerical Simulation Method for Plasma-Induced Damage Profile in SiO₂ Etching

Numerical Simulation Method for Plasma-Induced Damage Profile in SiO₂ Etching