Plasma dicing technology

Matsubara, Noriyuki; Windemuth, Reinhard; Hiroshima, Mitsuru; Harikai, Atsushi

doi:10.1109/estc.2012.6542178

Cited by 12 publications

(2 citation statements)

References 1 publication

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“…In the PDBG process [14], a photoresist was coated on a bare 8-inch Si wafer to a thickness of 15 μm. Photolithography was performed using a mask with a die size of 10 × 10 mm (Fig.…”

Section: Methodsmentioning

confidence: 99%

Plasma dicing before grinding process for highly reliable singulation of low-profile and large die sizes in advanced packages

Kim,

Park,

Kim

et al. 2023

Micro and Nano Syst Lett

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The demand for advanced packaging is driven by the need for low-profile, densely-integrated, large-die Si devices in substrate-based or wafer-level packaging. Die strength is a critical parameter for ultrathin dies, making die singulation a vital aspect of advanced packaging technology. In this work, we present a dicing before grinding (DBG) process to compare and analyze die strengths using a mechanical blade, stealth laser, and plasma dicing. The three DBG processes were applied to a 200 mm silicon (Si) wafer process with a die size of 10 × 10 mm2 and thicknesses of 100, 200, and 300 μm, respectively. Optical and electron microscopes were employed to investigate chipping quality, sidewall damage, and surface contamination. The bare Si die’s strength was assessed using a three-point bending test. Plasma dicing before grinding (PDBG) resulted in less contamination, chipping, and cracking compared to other DBG processes. Furthermore, PDBG exhibited the highest die strength of 1052 Pa.

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“…In the PDBG process [14], a photoresist was coated on a bare 8-inch Si wafer to a thickness of 15 μm. Photolithography was performed using a mask with a die size of 10 × 10 mm (Fig.…”

Section: Methodsmentioning

confidence: 99%

Plasma dicing before grinding process for highly reliable singulation of low-profile and large die sizes in advanced packages

Kim,

Park,

Kim

et al. 2023

Micro and Nano Syst Lett

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show abstract

“…Plasma dicing produces fewer chippings after cutting and does not cause physical damage compared to mechanical or laser dicing. Thus, it demonstrates a better die quality and economy, which is suitable for dicing thin wafers [81][82][83]. Figure 3 shows a 300 mm plasma-diced silicon wafer plated with −7 to −10 mA/cm 2 for 2.5 h [80].…”

Section: Plasma Dicing Of Si-wafer With Tsvsmentioning

confidence: 99%

Advanced 3D Through-Si-Via and Solder Bumping Technology: A Review

Jang,

Sharma,

Jung

2023

Materials

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Three-dimensional (3D) packaging using through-Si-via (TSV) is a key technique for achieving high-density integration, high-speed connectivity, and for downsizing of electronic devices. This paper describes recent developments in TSV fabrication and bonding methods in advanced 3D electronic packaging. In particular, the authors have overviewed the recent progress in the fabrication of TSV, various etching and functional layers, and conductive filling of TSVs, as well as bonding materials such as low-temperature nano-modified solders, transient liquid phase (TLP) bonding, Cu pillars, composite hybrids, and bump-free bonding, as well as the role of emerging high entropy alloy (HEA) solders in 3D microelectronic packaging. This paper serves as a guideline enumerating the current developments in 3D packaging that allow Si semiconductors to deliver improved performance and power efficiency.

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Heterogeneous Integration at Scale

Iyer¹,

Vaisband²

2022

Advances in Semiconductor Technologies

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Plasma dicing technology

Cited by 12 publications

References 1 publication

Plasma dicing before grinding process for highly reliable singulation of low-profile and large die sizes in advanced packages

Plasma dicing before grinding process for highly reliable singulation of low-profile and large die sizes in advanced packages

Advanced 3D Through-Si-Via and Solder Bumping Technology: A Review

Heterogeneous Integration at Scale

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