PLAUs: Posit Logarithmic Approximate Units to Implement Low-Cost Operations with Real Numbers

Murillo, Raúl; Mallasén, David; Barrio, Alberto A. Del; Botella, Guillermo

doi:10.1007/978-3-031-32180-1_11

Cited by 3 publications

(3 citation statements)

References 31 publications

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“…These are set with parameters in the Register-Transfer Level (RTL) description of the core, so they take effect at synthesis time. Furthermore, as typically the multiplicative arithmetic units are among the most power-hungry modules [34], [35], [36], we permit either the use of the logarithm-approximate units presented in [37] or exact units for the multiplication, division and square root operations [38]. The exact units for these last two operations use a non-restoring division algorithm [39].…”

Section: Big-percival Corementioning

confidence: 99%

“…If the target application can tolerate some errors in the division and square root outputs, using the logarithmapproximate units [37] allows for a significant reduction in LUT and FF usage. This is especially true in the 64-bit case, where the total PAU LUTs can be cut in half and the FFs reduced to only 25%.…”

Section: Fpgamentioning

confidence: 99%

“…The cost of these exact units is substantially reduced in the case of using the corresponding approximate units. As the works in [36], [37], [41], [42] highlight, error-resilient applications may benefit from those. Such is the case of Deep Neural Networks (DNNs), filters, and other Machine Learning kernels.…”

Section: Fpgamentioning

confidence: 99%

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Big-PERCIVAL: Exploring the Native Use of 64-Bit Posit Arithmetic in Scientific Computing

Mallasén,

Del Barrio,

Prieto-Matias

2024

IEEE Trans. Comput.

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The accuracy requirements in many scientific computing workloads result in the use of double-precision floating-point arithmetic in the execution kernels. Nevertheless, emerging real-number representations, such as posit arithmetic, show promise in delivering even higher accuracy in such computations. In this work, we explore the native use of 64-bit posits in a series of numerical benchmarks and compare their timing performance, accuracy and hardware cost to IEEE 754 doubles. In addition, we also study the conjugate gradient method for numerically solving systems of linear equations in real-world applications. For this, we extend the PERCIVAL RISC-V core and the Xposit custom RISC-V extension with posit64 and quire operations. Results show that posit64 can obtain up to 4 orders of magnitude lower mean square error than doubles. This leads to a reduction in the number of iterations required for convergence in some iterative solvers. However, leveraging the quire accumulator register can limit the order of some operations such as matrix multiplications. Furthermore, detailed FPGA and ASIC synthesis results highlight the significant hardware cost of 64-bit posit arithmetic and quire. Despite this, the large accuracy improvements achieved with the same memory bandwidth suggest that posit arithmetic may provide a potential alternative representation for scientific computing.

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