Polar-on-nonpolar epitaxy

Kroemer, H.

doi:10.1016/0022-0248(87)90391-5

Cited by 498 publications

(262 citation statements)

References 17 publications

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“…A key issue to make them attractive for industrial applications is their integration on the widely developed Si platform. There are numerous challenges for a successful integration of III-Vs on silicon, such as lattice mismatch, differences in thermal expansion coefficients and polarity [4]. It has been shown that III-V nanowires can overcome these challenges thanks to their small footprint [5][6][7].…”

Section: Introductionmentioning

confidence: 99%

Characterization and analysis of InAs/p–Si heterojunction nanowire-based solar cell

Mallorquí¹,

Alarcón-Lladó²,

Russo-Averchi³

et al. 2014

J. Phys. D: Appl. Phys.

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The growth of compound semiconductor nanowires on the silicon platform has opened many new perspectives in the area of electronics, optoelectronics and photovoltaics. We have grown a 1 × 1 mm 2 array of InAs nanowires on p-type silicon for the fabrication of a solar cell. Even though the nanowires are spaced by a distance of 800 nm with a 3.3% filling volume, they absorb most of the incoming light resulting in an efficiency of 1.4%. Due to the unfavourable band alignment, carrier separation at the junction is poor. Photocurrent increases sharply at the surrounding edge with the silicon, where the nanowires do not absorb anymore. This is further proof of the enhanced absorption of semiconductors in nanowire form. This work brings further elements in the design of nanowire-based solar cells.

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Section: Introductionmentioning

confidence: 99%

Characterization and analysis of InAs/p–Si heterojunction nanowire-based solar cell

Mallorquí¹,

Alarcón-Lladó²,

Russo-Averchi³

et al. 2014

J. Phys. D: Appl. Phys.

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“…A diode structure consisting of Au/n-GaAs over Ge often gives a higher ideality factor, lower barrier height, and a soft breakdown voltage due to the misfit dislocations formed inside the GaAs substrate during the heteroepitaxial growth process [1]. Unless the MOVPE growth parameters are precisely controlled, the epi-GaAs over Ge often gives antiphase domains and misfit dislocations, which gives rise to poor electrical transport characteristics [2][3][4][5][6][7]. In fact, the grown GaAs epilayer over Ge might contribute to the high density of surface states, which increases the surface recombination velocity, decreases the minority carrier lifetime, and increases the leakage at the junction, all of which worsening the GaAs/Ge solar cell performance [6,7].…”

Section: Introductionmentioning

confidence: 99%

Interface states density distribution in Au/n-GaAs Schottky diodes on n-Ge and n-GaAs substrates

Hudait

Krupanidhi

2001

Materials Science and Engineering: B

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The current-voltage (I -V) and capacitance-voltage (C-V) characteristics of Au/n-GaAs Schottky diodes on n-Ge substrates are investigated and compared with characteristics of diodes on GaAs substrates. The diodes show the non-ideal behavior of I-V characteristics with an ideality factor of 1.13 and barrier height of 0.735 eV. The forward bias saturation current was found to be large (3 ×10 − 10 A vs. 4.32 × 10 − 12 A) in the GaAs/Ge Schottky diodes compared with the GaAs/GaAs diodes. The energy distribution of interface states was determined from the forward bias I -V characteristics by taking into account the bias dependence of the effective barrier height, though it is small. The interface states density was found to be large in the Au/n-GaAs/n-Ge structure compared with the Au/n-GaAs/n + -GaAs structure. The possible explanation for the increase in the interface states density in the former structure was highlighted.

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“…The calculations show excellent agreement with experiment only for a gapped interface with a P layer in contact with Si and show that a combination of theory and experiment can reveal localized electronic states and the atomic structure at buried interfaces. Thin layers of III-V semiconductors grown on Si(001) have been widely investigated for III-V on-silicon integration [1]. Applications for GaP on Si include buffer layers in multijunction GaAsP=Si photovoltaics [2,3].…”

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confidence: 99%

Dielectric Anisotropy of the GaP/Si(001) Interface from First-Principles Theory

Kumar

Patterson

2017

Phys. Rev. Lett.

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First-principles calculations of the dielectric anisotropy of the GaP=Sið001Þ interface are compared to the anisotropy extracted from reflectance measurements on GaP thin films on Si(001) [O. Supplie et al., Phys. Rev. B 86, 035308 (2012)]. Optical excitations from two states localized in several Si layers adjacent to the interface result in the observed anisotropy of the interface. The calculations show excellent agreement with experiment only for a gapped interface with a P layer in contact with Si and show that a combination of theory and experiment can reveal localized electronic states and the atomic structure at buried interfaces.

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Polar-on-nonpolar epitaxy

Cited by 498 publications

References 17 publications

Characterization and analysis of InAs/p–Si heterojunction nanowire-based solar cell

Characterization and analysis of InAs/p–Si heterojunction nanowire-based solar cell

Interface states density distribution in Au/n-GaAs Schottky diodes on n-Ge and n-GaAs substrates

Dielectric Anisotropy of the GaP/Si(001) Interface from First-Principles Theory

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