Polarity asymmetry of oxides grown on polycrystalline silicon

Lee, J.C.; Hu, Chenming

doi:10.1109/16.3365

Cited by 39 publications

(23 citation statements)

References 10 publications

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“…Lee and Hu 23 reported that different polyoxides ͑dry oxidation, wet oxidation, and LPCVD deposition͒ grown on the phosphorus in situ doped polysilicon films had the same polarity dependence ͑i.e., the polyoxide conducts more current under −V g bias than that under +V g bias͒, and the polarity asymmetry of the phosphorus in situ doped polysilicon was opposite to those of the implanted and POCl 3 -doped polysilicons. Therefore, they suspect that the phosphorus in situ doped polysilicon consists of more uniform and small grains such that there is a high density of small bumps at the polysilicon/polyoxide interfaces, and the density of small bumps is higher at the top poly-2 interface than that at the bottom poly-1 interface.…”

Section: Resultsmentioning

confidence: 99%

Polarity Asymmetry of Polyoxide Grown on Phosphorus In Situ Doped Polysilicon

Kao

Lai

Lee

2006

J. Electrochem. Soc.

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We show that polyoxides grown on phosphorus in situ doped polysilicon have larger polarity asymmetry than that on the POCl 3 -doped polysilicon. It may be not only the surface roughness between the polysilicon/polyoxide interfaces, but also the phosphorus distribution in the interfaces. For the phosphorus in situ doped poly film, the phosphorus piled up at the poly-1/ polyoxide interface should result from the out-diffusion of the poly-1 doping during the tetraethyl orthosilicate oxide deposition process. However, the phosphorus concentration near the polyoxide/top poly-2 interface was lower than the bulk concentration of the polysilicon film, which may result from insufficient phosphorus concentration near the polyoxide/top poly-2 interface without subsequent annealing and dopant activation. Therefore, this may affect the polarity asymmetry of the electrical characteristics for the phosphorus in situ doped samples. Especially, the thermal polyoxide had the largest polarity asymmetry due to very high phosphorus concentration piled up in the bottom poly-1/polyoxide interface. We also show that the top poly-2 doping process affects the phosphorus distribution in the polysilicon/polyoxide interfaces, and further, affects the polyoxide performance.Thermal oxides grown on the n+ polycrystalline silicon, i.e., polyoxides, have been used as the interdielectric 1-4 for nonvolatile memory application. However, it is well known that the polyoxides have drawbacks of a lower dielectric strength and a higher leakage current than oxides grown on the single-crystal silicon due to nonuniformity polyoxide thickness and rough asperities ͑surface roughness͒. Also, the characteristics of polyoxides have been shown to depend on the structure and morphology of the predeposited polysilicon film, which in turn are affected by the deposition temperature, doping conditions, and the oxidation temperature. [5][6][7][8][9][10] It was previously reported that the surface morphology could be improved by replacing the POCl 3 -doped polysilicon with the phosphorus in situ doped polysilicon deposited in the amorphous state. The polysilicon has more uniform small grains and thus a flatter and smoother interface 11-15 and the polyoxide grown on it has better electrical characteristics. It was also reported that more reliable dielectrics could be grown on polysilicon by using chemical vapor deposition ͑CVD͒ instead of thermal oxidation. For those CVD deposited dielectrics, the grain boundaries present in the bottom polysilicon are not incorporated in the deposited layer due to no polysilicon consumption and the surface of the polysilicon layer is not roughened, so the CVD oxide potentially has a defect density relatively independent of the bottom polysilicon. [16][17][18][19][20][21][22] In this paper, we present the CVD deposited polyoxide grown on the phosphorus in situ doped polysilicon, which has larger polarity asymmetry than that on the POCl 3 doped polysilicon. It may be not only the surface roughness between the polysilicon/polvoxide interfa...

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Section: Resultsmentioning

confidence: 99%

Polarity Asymmetry of Polyoxide Grown on Phosphorus In Situ Doped Polysilicon

Kao

Lai

Lee

2006

J. Electrochem. Soc.

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“…Oxide grown on single crystalline-Si is included for comparison. Both polyoxides are more conductive than oxide grown on single crystalline-Si due to the asperity effect of the rougher polyoxide/poly-Si interfaces (1)(2)(3)(4)(5)(6)(7). For a given Eox, the current densities in conventional furnace polyoxide are several orders of magnitude higher than that in RTO~ polyoxide.…”

Section: Comparison Of Rapid Thermal Oxidation and Furnacementioning

confidence: 90%

Current Conduction and Charge Trapping in Thin Interpoly Dielectrics Prepared by In Situ Multiple Rapid Thermal Processing

Cheung

Kwong

1992

J. Electrochem. Soc.

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In this paper we report a systematic and comprehensive study of the effects of post-oxidation anneals on the electrical properties of thin polyoxide films. Thin (---20 nm) interpoly dielectrics have been grown on phosphorus implanted polysilicon by in situ multiple rapid thermal processing (RTP) including rapid thermal oxidation (RTO1), rapid thermal nitridation (RTN), and subsequent rapid thermal reoxidation (RTO2). In comparison with polyoxides grown in conventional furnace, RTO~ polyoxides exhibit a significantly reduced leakage current. In addition, both the dielectric breakdown strength and breakdown field distribution have been improved. It is found that RTN of RTO1 results in polyoxides with an unusual polarity asymmetry dependence of electrical conduction and trapping properties, i.e., a higher electrical conduction and electron trapping rate for electrons injected from the top poly-Si electrode than for electrons injected from the bottom poly-Si electrode. Subsequent RTO2 of nitrided polyoxides results in a reduction of both the leakage current and electron trapping rate. Longer RTO2, however, increases the leakage current due to the progressively deteriorated poly-Si/ polyoxide interracial texture.Oxide films grown on n+-poly-Si (i.e. polyoxides) are essential for the development of nonvolatile memory applications such as EPROM and E~'PROM devices. The scaling of device geometries makes thinner polyoxides necessary in order to keep a high gate coupling ratio. Device performance is determined by its data retentivity and programming efficiency, in terms of the leakage current and dielectric strength. However, polyoxides usually exhibit higher leakage current and inferior dielectric strength in comparison with oxides of comparable thickness grown on single crystalline-Si, due to the asperities and bumps at the polyoxide/poly-Si interface which lead to a localized field enhancement (1-7). The "roughness" is attributed to the different oxidation rates of randomly oriented poly-Si grains in low temperature ranges where the interfacial reaction rate controls the oxidation kinetics (8) and the irregular grain growth during the poly-Si doping process (8). It has been found that the quality of polyoxides depends upon the poly-Si preparation, oxidation condition, and post-oxidation annealing. It is known that the poly-Si oxidation and the electrical characteristics of resulting polyoxides strongly depend on the smoothness of the poly-Si surface prior to oxidation, as well as the doping conditions (8). For instance, a high temperature annealing of POCI~ doped poly-Si with an optimum level of 6 • 102o cm -s prior to oxidation was demonstrated to improve the dielectric strength (9) and reduce the leakage current (10). On the other hand, it has been proposed (8) and demonstrated (11, 12) that a smooth polyoxide/poly-Si interface could be achieved by a high temperature oxidation (e.g., 1050-1100~ which is predominantly diffusion-controlled. Furthermore, to improve the quality of polyoxide, furnace nitridation of polyox...

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“…However, previously reported poly-Si TFT EEPROM's show poor performance and preliminary nonvolatile functions due to poor electrical properties of tunnel oxide grown on poly-Si [1]. It was reported that the electrical characteristics of oxide is mainly determined by the interface roughness of oxide/poly-Si [4], [5], which can be improved by ECR plasma oxidation [6], [7]. On the other hand, nitrogen atoms introduced into the oxide bulk and oxide/Si interface improve the reliability of tunnel oxide and the endurance characteristics of EEPROM's [8].…”

Section: Introductionmentioning

confidence: 99%

High-performance EEPROMs using N- and P-channel polysilicon thin-film transistors with electron cyclotron resonance N₂O-plasma oxide

Lee

Lee²,

Kim³

et al. 1999

IEEE Electron Device Lett.

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High-performance EEPROM's using n-and p-channel polysilicon thin-film transistors (poly-Si TFT's) with electron cyclotron resonance (ECR) N 2 O-plasma oxide have been demonstrated. Both programming and erasing were accomplished by Fowler-Nordheim (F-N) tunneling within 1 ms regardless of programming and erasing voltages. The poly-Si TFT EEPROM's have a threshold voltage shift of 4 V between programmed and erased states; furthermore, maintain a large threshold voltage shift of 2.5 V after 1 210 5 program and erase cycles. This is attributed to the excellent charge-to-breakdown (Qbd) up to 10 C/cm 2 of ECR N 2 O-plasma oxide. Index Terms-EEPROM, ECR N 2 O-plasma oxide, endurance, poly-Si TFT, Qbd.

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Polarity asymmetry of oxides grown on polycrystalline silicon

Cited by 39 publications

References 10 publications

Polarity Asymmetry of Polyoxide Grown on Phosphorus In Situ Doped Polysilicon

Polarity Asymmetry of Polyoxide Grown on Phosphorus In Situ Doped Polysilicon

Current Conduction and Charge Trapping in Thin Interpoly Dielectrics Prepared by In Situ Multiple Rapid Thermal Processing

High-performance EEPROMs using N- and P-channel polysilicon thin-film transistors with electron cyclotron resonance N₂O-plasma oxide

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Polarity asymmetry of oxides grown on polycrystalline silicon

Cited by 39 publications

References 10 publications

Polarity Asymmetry of Polyoxide Grown on Phosphorus In Situ Doped Polysilicon

Polarity Asymmetry of Polyoxide Grown on Phosphorus In Situ Doped Polysilicon

Current Conduction and Charge Trapping in Thin Interpoly Dielectrics Prepared by In Situ Multiple Rapid Thermal Processing

High-performance EEPROMs using N- and P-channel polysilicon thin-film transistors with electron cyclotron resonance N2O-plasma oxide

Contact Info

Product

Resources

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High-performance EEPROMs using N- and P-channel polysilicon thin-film transistors with electron cyclotron resonance N₂O-plasma oxide