Polarization‐Engineered n⁺GaN/InGaN/AlGaN/GaN Normally‐Off MOS HEMTs

Abstract

The proposal, processing and performance of n þ GaN/InGaN/AlGaN/GaN normally-off metal-oxide-semiconductor (MOS) HEMTs with a recessed 2-mm long gate/8-mm source-drain distance are presented. It is shown that by using a negative polarization charge at the InGaN/AlGaN interface together with 10-nm thick Al 2 O 3 gate insulation, a threshold voltage V T increases by 3.6 V reaching a value of $1.6 V. Moreover, the combination of the gate recessing through the n þ GaN cap and gate insulation lead to an invariant maximal drain current of about 0.25 A mm À1 , as well as decreased gate leakage current in the order of $10 À9 A mm À1 . Analytical equations explain the predictive setting of V T up to 7 V with the oxide thickness t ox increase, if holes compensate the negative polarization charge. By applying t ox ¼ 30 nm a V T $ 3 V was obtained; p-doping of the cap/barrier layers is suggested to reach the theoretically predicted scalability.

InGaN/(GaN)/AlGaN/GaN normally-off metal-oxide-semiconductor high-electron mobility transistors with etched access region

“…6) In this way, by combining polarization and p-doping, 13) an unprecedented hole concentration and predictive V T scalability above +5 V can be expected. 6) On the other hand, avoiding gate recess may provide a less spoiled MOS interface with more stable V T , 14) while removing InGaN at access regions may lead to lower drain leakage and higher breakdown voltage. 6,15) However, carefully controlled removal of the capping layer with consecutive surface passivation of the AlGaN surface is needed to provide HEMT low access resistance, similarly as in conventional p-GaN/AlGaN/GaN HEMTs.…”

“…[1][2][3][4][5][6][7][8][9] Several methods were successfully applied to manipulate V T in true high-electron mobility transistors (HEMTs) without removing a quantum well (QW) high-mobility channel. Among them are fluoride implantation to barrier, 1) p-GaN capping, 2,3) gate stack polarization engineering, [4][5][6] or reduction of a surface donors density. 7,8) In these concepts an additional negative charge is introduced in a gate region and consequently an energetic band structure is raised while electrons are depleted from the QW.…”

“…Increase of a positive threshold voltage (V T ) in GaN-based transistors is needed for safe operation of high-performance switches and logic circuits. [1][2][3][4][5][6][7][8][9] Several methods were successfully applied to manipulate V T in true high-electron mobility transistors (HEMTs) without removing a quantum well (QW) high-mobility channel. Among them are fluoride implantation to barrier, 1) p-GaN capping, 2,3) gate stack polarization engineering, [4][5][6] or reduction of a surface donors density.…”

“…11,12) As pointed out by us recently, setting a high V T can be achieved by combining polarization engineering and increasing the oxide thickness in the metaloxide-semiconductor (MOS) gate stack. 6) Still, several issues remain to be solved in the reported gate-recessed polarization-engineered n + GaN/InGaN/AlGaN/GaN normally-off MOS HEMT: the need for supplemental p-doping, and testing of the alternative InGaN/(GaN)/AlGaN/GaN heterostructure with access region etching. 6) In this way, by combining polarization and p-doping, 13) an unprecedented hole concentration and predictive V T scalability above +5 V can be expected.…”

“…6) Still, several issues remain to be solved in the reported gate-recessed polarization-engineered n + GaN/InGaN/AlGaN/GaN normally-off MOS HEMT: the need for supplemental p-doping, and testing of the alternative InGaN/(GaN)/AlGaN/GaN heterostructure with access region etching. 6) In this way, by combining polarization and p-doping, 13) an unprecedented hole concentration and predictive V T scalability above +5 V can be expected. 6) On the other hand, avoiding gate recess may provide a less spoiled MOS interface with more stable V T , 14) while removing InGaN at access regions may lead to lower drain leakage and higher breakdown voltage.…”