Polychronous automata and their use for formal validation of AADL models

Abstract

This paper investigates how state diagrams can be best represented in the polychronous model of computation (MoC) and proposes to use this model for code validation of behavior specifications in AADL. In this relational MoC, the basic objects are signals, which are related through dataflow equations. Signals are associated with logical clocks, which provide the capability to describe systems in which components obey to multiple clock rates. We propose a model of finite-state automata, called polychronous automata, which is based on clock relations. A specificity of this model is that an automaton is submitted to clock constraints. This allows one to specify a wide range of control-related configurations, either reactive, or restrictive with respect to their control environment. A semantic model is defined for these polychronous automata, that relies on a Boolean algebra of clocks. Based on a previously defined modeling of AADL software architectures using the polychronous MoC, this model of polychronous automata is used as a formal model for the AADL Behavior Annex. This is illustrated with a case study which specifies an adaptive cruise control system.

Formal Verification of AADL Models by Event-B

“…The SYNDEX model is used to do distribution, scheduling and architecture exploration. Gautier et al [29] present a formal model of automata based on clock relations, this model is called polychronous automata. Then they refine the AADL transformation into polychronous models which are introduced in [32] by presenting the AADL Behavior annex as polychronous automata.…”