Power Density Optimization of a DC/DC Converter for an Aircraft Supercapacitors Energy Storage

Abstract

This paper presents a computationally efficient design algorithm for a DC/DC converter, optimized for power density. Interleaving and series-connecting of several converter cells is included in the analysis. The choice of the converter design parameters, such as the semiconductor devices or the number of interleaved converter cells may have unpredictable impacts on the resulting power density. Therefore, fully analytical models of the operating waveforms, the converter losses and also the converter weight are introduced. Using those models, an algorithm is developed to optimize a 2 kW DC/DC converter for an aircraft supercapacitors energy storage system.

Design and Evaluation of a Power Converter for an Energy Storage System for Aircrafts

“…75% (discharged) to 100% fully charged, the dutycycle (horizontal) axis can be splitted into three ranges (1:0.75:0.75 2 ), each corresponding to a particular battery stack design: 100-75-56 series connected cells. Whilst the shape resembles the typical shapes of the DC-link current ripple curves already published in literature [2]- [6] that assume constant load current, these shown in Fig. 3 are assuming a constant power type of load which means that as no of cells reduces, stack voltage reduces which causes an increase of the overall current.…”

“…Interleaving is a technique that enables several advantages: the implementation of power converters rated at currents multiple times higher than the rating of a single power semiconductors; by staggering the gating pulses for the switching devices in the different legs by 360/N, it is possible to obtain partial harmonic cancelation in both the cumulated inductor current seen by the energy storage devices (IES) in conjunction with increasing the frequency of the remaining current ripple and this has been modelled for both independent and coupled inductors as reported in [2]- [6]; the cancelation of resulting currents is also obtained in the DC link side of the converter that may enable a reduction of the 270V bus voltage filter which is significantly more critical in this system as the power quality standards are very tight in aircraft applications especially in the presence of a large power rated converter (tens kW). Fig.…”

Analytical Conduction Loss Calculation of a MOSFET Three-Phase Inverter Accounting for the Reverse Conduction and the Blanking Time

“…Having the MOSFET turning on and off during reverse conduction would in theory increase the switching losses. However, due to the fact that the diode is conducting in parallel or is conducting during the blanking time, the voltage across the MOSFET is forced to V d + R dÎ during the beginning of the switching transient, achieving quasi zero-voltage-switching (ZVS) [12], [37]. Therefore, the switching losses of the MOSFET during reverse conduction are negligible.…”

Development of a Smart Supercapacitor Energy Storage System for Aircraft Electric Power Systems

“…However, the maximum current required to deliver the given power (2 kW) at minimum voltage is increased significantly and this may increase the thermal stress of the SC-ESS and increase the weight/size of the interfaced converter. As per the investigations done in [15,16], implementing a twochannel interleaved converter in conjunction with wide band-gap semiconductor switches can minimize the effects of the increased current rating on the converter size/weight. Additionally, the investigations carried out in [15] show minor differences in terms of thermal stresses between the two cells due to the better thermal characteristics and reduced internal resistance of the 350 F SC cell.…”