2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig) 2016
DOI: 10.1109/reconfig.2016.7857181
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Power-efficiency analysis of accelerated BWA-MEM implementations on heterogeneous computing platforms

Abstract: Abstract-Next Generation Sequencing techniques have dramatically reduced the cost of sequencing genetic material, resulting in huge amounts of data being sequenced. The processing of this data poses huge challenges, both from a performance perspective, as well as from a power-efficiency perspective. Heterogeneous computing can help on both fronts, by enabling more performant and more power-efficient solutions.In this paper, power-efficiency of the BWA-MEM algorithm, a popular tool for genomic data mapping, is … Show more

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Cited by 5 publications
(3 citation statements)
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“…However, large monetary investments for chip design and the rigid architecture performing fixed operations limit the ASICs for wide adoption in genomics applications. Due to the high cost and energy consumption of GPU based clusters, FPGAs are often preferred for processing genomic data as they offer massive parallelism, low cost and high energy efficiency [12], [14], [18], [20]. Various algorithms for applications like pairwise sequence alignment, database searching, string matching, multiple sequence alignment, read mapping, etc., are designed using reconfigurable FPGA hardware [12], [18]- [20], [24], [41]- [44].…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…However, large monetary investments for chip design and the rigid architecture performing fixed operations limit the ASICs for wide adoption in genomics applications. Due to the high cost and energy consumption of GPU based clusters, FPGAs are often preferred for processing genomic data as they offer massive parallelism, low cost and high energy efficiency [12], [14], [18], [20]. Various algorithms for applications like pairwise sequence alignment, database searching, string matching, multiple sequence alignment, read mapping, etc., are designed using reconfigurable FPGA hardware [12], [18]- [20], [24], [41]- [44].…”
Section: Related Workmentioning
confidence: 99%
“…In this paper, we propose a novel energy-efficient read mapper using a single FPGA system-on-chip (SoC) platform. Read mapping includes two stages, filtering and verification [9], [14], [21]- [23]. The first stage identifies candidate locations in the reference genome for the reads and the second stage calculates the exact alignment of the reads to the reference genome.…”
Section: Introductionmentioning
confidence: 99%
“…The authors discussed acceleration of the Seed Extension kernel of the BWA-MEM algorithm on a GPU accelerator and achieved up to 1.6× improvement in comparison of application-level execution time . Power-Efficiency Analysis of Accelerated BWA-MEM Implementations on Heterogeneous Computing Platform against the software-only baseline system is studied in (Houtgast, Sima, Marchiori, Bertels, & Al-Ars, 2016) By offloading the Seed Extension phase on an accelerator. A high-performance FPGA-based Seed Extension IP core is designed(Pham-Quoc, Kieu-Do, & Thinh, n.d.) for BWA-MEM DNA Alignment that achieve 350× speedup when compare to an Intel Core i5 general purpose processor.…”
Section: Related Workmentioning
confidence: 99%