Power Function Algorithms Implemented in Microcontrollers and FPGAs

Abstract

The exponential function ax is widespread in many fields of science. Its calculation is a complicated issue for Central Processing Units (CPUs) and Graphics Processing Units (GPUs), as well as for specialised Digital Signal Processing (DSP) processors, such as Intelligent Processor Units (IPUs), for the needs of neural networks. This article presents some simple and accurate exponential function calculation algorithms in half, single, and double precision that can be prototyped in Field-Programmable Gate Arrays (FPGAs). It should be noted that, for the approximation, the use of effective polynomials of the first degree was proposed in most cases. The characteristic feature of such algorithms is that they only contain fast ‘bithack’ operations (‘bit manipulation technique’) and Floating-Point (FP) addition, multiplication, and (if necessary) Fused Multiply-Add (FMA) operations. We published an article on algorithms for this class of function recently, but the focus was on the use of approximations of second-degree polynomials and higher, requiring two multiplications and two additions or more, which poses some complications in FPGA implementation. This article considers algorithms based on piecewise linear approximation, with one multiplication and one addition. Such algorithms of low complexity provide decent accuracy and speed, sufficient for practical applications such as accelerators for neural networks, power electronics, machine learning, computer vision, and intelligent robotic systems. These are FP-oriented algorithms; therefore, we briefly describe the characteristic parameters of such numbers.

An Edge Computing Application of Fundamental Frequency Extraction for Ocean Currents and Waves

“…In the same way as presented for Arm Cortex-M7 in [ 41 ], the number of cycles to execute in an exponential or square root function is quite similar for the type of data evaluated. In case of the exponential function, the advantage of to use optimization flag level 2 is a minimum of a 26.8%.…”

“…The execution of these kind of mathematical functions is widely studied in the literature. For example, the authors of [ 41 ] use a STM32F746 and STM32H750 from ST Microcontrollers including a FPU (float and double precision, respectively) to compare the implementation of an exponential function using hardware acceleration and the software solution, in terms of computational effort required. Although this study is evaluated using an Arm Cortex-M7, the authors conclude that there are no significant differences in the number of cycles required by the operation, regardless of bit width using integers or floating point numbers.…”

Application and Development of EEG Acquisition and Feedback Technology: A Review

“…Compared to FPGA and DSP, CPUs have a slower processing speed, but they possess greater versatility and larger storage capacity. Hence, CPUs are typically used to implement complex algorithms and data-processing tasks such as neural networks and machine learning [73,74]. For example, the HiCCE-128 EEG acquisition system designed by Mannatunga et al [75] supports EEG decoding by running EEG processing programs on a front-end processor.…”