Power Hardware-in-the-Loop Test Bench for Permanent Magnet Synchronous Machines based on a Parallel Hybrid Converter

Abstract

This poster presents a Power Hardware-in-the-Loop (PHIL) emulation test bench for emulating highly utilized permanent magnet synchronous machines (PMSM). The emulation converter of the PHIL test bench is a Cascaded H-bridge based Parallel Hybrid Converter (PHC) with a 17-level output voltage and a modulation frequency of 1 MHz. The nonlinear machine is emulated with a sampling frequency of 5 MHz and is implemented on the FPGA of a Real-Time Simulation System (RTSS)