Power optimal MTCMOS repeater insertion for global buses

Fatemi, Hanif; Amelifar, Behnam; Pedram, Massoud

doi:10.1145/1283780.1283802

Cited by 5 publications

(8 citation statements)

References 21 publications

(27 reference statements)

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“…Assume that after buffer insertion, the bus interconnect is divided into N segments, each of which has a length of l. By adopting the optimization method in Ref. 8 and the values of parameters from the 40-nm CMOS technology, the optimum length l opt of interconnect between every two repeaters is 1095 μm. When low threshold voltage (LVT) transistors with minimum channel length (L = 40 nm) are used, the optimum width of the NMOS transistor in the repeaters is 21 μm.…”

Section: Optimization Of Bus Coding Systemsmentioning

confidence: 99%

“…[6][7][8][9] By inserting repeaters along a long wire, each segment of the divided interconnect is strongly driven by the inserted buffers. [6][7][8][9] By inserting repeaters along a long wire, each segment of the divided interconnect is strongly driven by the inserted buffers.…”

Section: Introductionmentioning

confidence: 99%

“…Repeater (inverter/buffer) insertion is the most commonly used technique to deal with signal integrity issues in global interconnects. [6][7][8][9] By inserting repeaters along a long wire, each segment of the divided interconnect is strongly driven by the inserted buffers. The immunity of interconnects to crosstalk noise is thereby enhanced.…”

Section: Introductionmentioning

confidence: 99%

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Crosstalk‐noise‐aware bus coding with low‐power ground‐gated repeaters

Jiao

Wang

2017

Circuit Theory & Apps

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Crosstalk noise is one of the serious reliability concerns in nanoscale integrated circuits. Repeater insertion together with shielding wires is a typical method to suppress crosstalk noise associated with global data bus. A new crosstalk-noise-aware bus coding scheme with ground-gated repeaters is proposed in this paper to minimize the routing overhead as well as power consumption of data bus systems. A subset of 4-to-6 crosstalk-noise-aware codes is selected to minimize the number of simultaneous data transitions. The routing overhead is reduced by 12.31% with the new bus coding scheme compared with the conventional data bus with shielding wires. Furthermore, the leakage power and worst-case active power consumptions are reduced by 12.5% and 18.26%, respectively, with the new crosstalk-noise-aware data bus system as compared with the previously published bus coding system in an industrial 40-nm CMOS technology.

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Section: Optimization Of Bus Coding Systemsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Crosstalk‐noise‐aware bus coding with low‐power ground‐gated repeaters

Jiao

Wang

2017

Circuit Theory & Apps

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“…The global interconnects carry signals for longer distances in a larger integrated circuit. The delay of global interconnects is increased quadratically with the wire length due to the higher resistance and capacitance [264] - [268]. Furthermore, global interconnects suffer from serious signal integrity issues caused by resistive voltage drops and crosstalk noise [154] - [157], [165], [167] - [173].…”

Section: Crosstalk Noise Aware Bus Coding With Low-leakage Mtcmos Repmentioning

confidence: 99%

“…Similar to the resistive voltage drop issue, crosstalk noise also causes longer propagation delay, higher power consumption, and degraded noise margin in nanoscale CMOS integrated circuits. Repeater insertion is the most commonly used technique to deal with speed degradation and signal integrity issues in global interconnects [165], [169], [170], [265] - [268]. The delay of a highly resistive interconnect is reduced if the interconnect is divided into shorter wire segments that are driven by repeaters [265] - [268].…”

Section: Crosstalk Noise Aware Bus Coding With Low-leakage Mtcmos Repmentioning

confidence: 99%

Noise mitigation in low leakage MTCMOS circuits

Jiao¹

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It is the journey, not the arrival, that matters." When I am approaching the ending point of the journey of my Ph. D. study, I would like to thank all the people who help me along the way.I would like to thank my supervisor, Professor Volkan Kursun, for his tireless guidance and continuous support during my Ph. D. study. His dedication and hard working stimulates me to devote more time into my research work. His strictness on every step of my study helps to maintain the high quality of my academic publications. He is unswervingly pursuing perfection, inspiring me to refine myself continuously. He spends tremendous amount of time in helping me to develop the necessary skills to be a successful and independent researcher. I will always remember his motivation to be an outstanding scientist. I also would like to thank Professor Zilong Wen, Professor Chi-Ying Tsui, Professor Jie Yuan, Professor Pedro V. Sander, and Professor Eby G. Friedman for serving on my Ph. D. thesis defense committee. My special thanks go to Professor Eby G. Friedman for coming all the way from the U. S. to attend my final oral examination. I am also grateful to Professor Amine Bermak for his service in my Ph. D. thesis proposal. I appreciate the support from all my colleagues and friends. I would like to thank Hong Zhu, Yanan Sun, Shairfe M. Salahuddin, and Khawar Sarfraz of Nanoelectronic Circuits and Gigascale Systems Lab for the help in the past years. I am also very grateful to the staff members, Siu Fai Luk, Kenny Pang, and Iris Ting, at the Department of Electronic andComputer Engineering for their constant support. Furthermore, I would like to express my thanks to Zhenyu Wu, Dongge Tang, and Guangcai Ding for the long term inspiration. I also would like to thank Xuan Li for the constant encouragements. There are too many friends who I would like to thank in Hong Kong, mainland China, the U. S., and Europe. The friendships will be imprinted in my mind forever. This dissertation is made possible with the support and encouragement from my parents. I am deeply indebted to my parents for their endless love. They are always with me whenever I vii am frustrated by my tough work. I would like to share every moment of joy of my life with them in the future. They will also be proud of my success in my future career. This dissertation is the ending of one journey, but the beginning of a new journey. All the helps, encouragements, and love that I received during my Ph. D. study will become my motivation to achieve more in the future.

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Crosstalk Noise Reduction in Long Wire Interconnects Using MTCMOS Inverters

Mallidu

Siddamal

2021

Lecture Notes in Electrical Engineering

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Power optimal MTCMOS repeater insertion for global buses

Cited by 5 publications

References 21 publications

Crosstalk‐noise‐aware bus coding with low‐power ground‐gated repeaters

Crosstalk‐noise‐aware bus coding with low‐power ground‐gated repeaters

Noise mitigation in low leakage MTCMOS circuits

Crosstalk Noise Reduction in Long Wire Interconnects Using MTCMOS Inverters

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