Power-Scalable, Complex Bandpass/Low-Pass Filter With I/Q Imbalance Calibration for a Multimode GNSS Receiver

Xu, Yang; Chi, Baoyong; Yu, Xiaobao; Qi, Nan; Chiang, Patrick; Wang, Zhihua

doi:10.1109/tcsii.2011.2177700

Cited by 30 publications

(12 citation statements)

References 14 publications

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“…Some previously reported works reject the image interference through digital signal processing in digital baseband, which require both I/Q outputs and high-resolution ADCs [18]- [20]. Recently, several digitally assisted analog domain calibration with only 2-bit ADCs and one channel output are achieved to improve the image rejection ratio (IMRR) by detecting the image signal amplitude [11], [21]- [23].…”

Section: B I/q Mismatch Calibrationmentioning

confidence: 99%

Reconfigurable All-Band RF CMOS Transceiver for GPS/GLONASS/Galileo/Beidou With Digitally Assisted Calibration

et al. 2015

IEEE Trans. VLSI Syst.

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This paper presents a fully integrated reconfigurable all-band RF transceiver for GPS/GLONASS/ Galileo/Beidou in 55-nm CMOS. The transceiver incorporates three low-IF receivers (RXs) and one direct up-conversion BPSK transmitter (TX), which can be configured to receive any two global navigation satellite system (GNSS) signals or switched to process the Chinese Beidou(I) signals. A switching module is integrated to provide the connectivity between different RF front-end and IF channel (IFC), which will effectively simplify the design complexity of the IFC and save power consumption, while the GNSS signals are received. A flexible frequency plan with two frequency synthesizers is utilized to satisfy different local oscillator requirements of the transceiver. An optimized automatic frequency calibration scheme using an error compensation logic enables fast and high-precision calibration process for optimum phase-locked loop operation. Several digitally assisted calibration modules are integrated to ensure that the chip performance only shows a weak process, voltage and temperature (PVT) dependence. While drawing about 21.5-30.2 mA per RX channel from a 1.2-V supply, the RXs achieve an image rejection ratio more than 49 dB after I/Q mismatch calibration, an automatic gain control range of 88 dB, and an input-referred 1 dB compression point of better than −25 dBm with a minimum noise figure of about 2 dB. The output power of the TX is about 5 dBm with about 6% error vector magnitude (EVM) and 30-mA current from a 1.2-V supply. The whole transceiver consumes a die area of 2.8 × 3 mm 2 .

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Section: B I/q Mismatch Calibrationmentioning

confidence: 99%

Reconfigurable All-Band RF CMOS Transceiver for GPS/GLONASS/Galileo/Beidou With Digitally Assisted Calibration

et al. 2015

IEEE Trans. VLSI Syst.

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“…To better analyze this detected image signal, firstly, the modulator's complex input impedance is derived. As the baseband currents and are up-converted, the resulting voltage across the RF input impedance is (13) Here, is the convolution integral. Since only the fundamental component is of interest, the higher-order harmonics of 25% duty-cycle LO are ignored.…”

Section: Digitally-assisted Self-calibrationmentioning

confidence: 99%

“…Hence, the calibration techniques for LO leakage and image rejection are necessary. Recently, most of the presented calibration schemes are realized with the complicated analog circuits which have limited regulation precision [11]- [13]. For instance, the I/Q calibration introduced in [7] only achieves 44 dBc image rejection ratio (IRR), and [11] obtains 51 dBc IRR through optimizing the mixer I/Q mismatch.…”

Section: Introductionmentioning

confidence: 99%

A 0.1–5.0 GHz Reconfigurable Transmitter With Dual-Mode Power Amplifier and Digitally-Assisted Self-Calibration for Private Network Communications

Yin

Chi

Gao

et al. 2014

IEEE Trans. Circuits Syst. I

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A 0.1-5.0 GHz 65 nm CMOS reconfigurable transmitter for private network wireless communications is presented. The transmitter integrates a 0.1-1.5 GHz high-efficiency dual-mode power amplifier to support low-cost narrowband applications and a 0.45-5.0 GHz efficiency-optimized pre-power amplifier to support high-performance wideband applications. A wideband PLL frequency synthesizer, DACs with reconfigurable sampling rate and the reconfigurable digital baseband processing with standard JESD207 interface are all included to implement the highly-integrated transmitter. Specifically, with the proposed digitally-assisted self-calibration technique for LO leakage and image rejection, the transmitter achieves 52 dBc LO leakage and 53 dBc image rejection ratio (IRR), showing 20 dB and 30 dB improvement compared with the un-calibrated cases, respectively. The system verifications have demonstrated an EVM of 1.7% for 905 MHz EDGE with 19.5 dBm output power, and an EVM of 3.2% for LTE Band42 with 5.5 dBm output power. This proposed transmitter has achieved the comparable or even better performance in linearity, noise floor and power consumption compared with the state-of-the-art reconfigurable transmitters.

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“…When certain OPA cells are turned off, their transconductance and output conductance is zero, and the corresponding is disconnected. As calculated from [23], the poles and zeros are times that of a single OPA for a FLOA with OPAs enabled, and thus times the GBW and power dissipation.…”

Section: Reconfigurable If Filtermentioning

confidence: 99%

A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration

Chi

et al. 2012

IEEE Trans. Circuits Syst. I

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A fully integrated dual-channel reconfigurable GNSS receiver supporting Compass/GPS/GLONASS/Galileo systems is implemented in 65 nm CMOS. The receiver incorporates two independent channels to receive dual-frequency signals simultaneously. GNSS signals located at the 1.2 GHz or 1.6 GHz bands are supported, with their bandwidths programmable among 2.2 MHz, 4.2 MHz, 8 MHz, 10 MHz, and 18 MHz. By implementing a flexible frequency plan with a low/zero-IF architecture and reconfigurable analog baseband circuits, only one frequency synthesizer is required to provide the local oscillator (LO) frequency for two channels, thereby avoiding any LO crosstalk. Analog baseband circuits employ operational amplifiers that are capable of power scaling, in order to minimize power consumption across different operating modes. An I/Q mismatch calibration module placed prior to the complex-IF bandpass filter is implemented to improve the image rejection ratio. The receiver achieves a minimum 1.88 dB noise figure, an average 50 dB image rejection ratio, and a 64 dB dynamic range with 1 dB steps of gain-adjustment, with a total power consumption of 31-44 mW. Finally, experimental verification combining both the receiver and a digital baseband shows a positioning result comparable to commercial chips.

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Power-Scalable, Complex Bandpass/Low-Pass Filter With I/Q Imbalance Calibration for a Multimode GNSS Receiver

Cited by 30 publications

References 14 publications

Reconfigurable All-Band RF CMOS Transceiver for GPS/GLONASS/Galileo/Beidou With Digitally Assisted Calibration

Reconfigurable All-Band RF CMOS Transceiver for GPS/GLONASS/Galileo/Beidou With Digitally Assisted Calibration

A 0.1–5.0 GHz Reconfigurable Transmitter With Dual-Mode Power Amplifier and Digitally-Assisted Self-Calibration for Private Network Communications

A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration

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