Power Yield Analysis Under Process and Temperature Variations

Abstract

In this paper, a method is proposed to accurately estimate the power yield, considering process-induced temperature and supply voltage variations. Process variations impose statistical behavior on the temperature and leakage current. This, in turn, impacts the drops due to the variations in the current, drawn off the power grid. By considering the process-induced statistical profile of the temperature and , the power yield is estimated for a chip. This helps check the robustness of the circuits early in the design process. The experimental results on the ISCAS89 benchmarks indicate a significant yield loss, if the statistical measures of the temperature and voltage drop are ignored. Monte Carlo simulations verify the accuracy of the developed methodology. Index Terms-Leakage, power yield, thermal analysis, voltage drop, voltage variations.

A cross-layer SER analysis in the presence of PVTA variations

“…Voltage drop due to di=dt is deeply investigated by Gupta et al [24]. The authors of [65,66] proposed a novel technique to obtain power, thermal, and IR-drop profiles in the presence of process variations. The authors of [67,68] further augmented these techniques to capture the impacts of BTI as well.…”

“…For PVTA analysis, we mainly use the models/methods presented in [70,24,66,67,19,75,69,32,30,68,66,80,81,71]. According to Fig.…”

Timing yield analysis considering process-induced temperature and supply voltage variations

“…This temperature difference will be even larger for smaller feature sizes where variations are more significant. This, in turn, results in the error up to 80% in the estimation of the leakage power [11]. The impact of such inaccuracy on IR drop and timing yield is significant.…”

“…For detailed information, on the extraction of the statistical measures of power and temperature, the reader is referred to [11].…”

Frequency, Voltage and Temperature Sensor Design for Fire Detection in VLSI Circuit on FPGA

“…Therefore, a new parameterized dynamic thermal modeling algorithm for emerging thermal-aware design and optimization for highperformance microprocessor design at architecture and package levels [12]. Process variations impose statistical behavior on the temperature and leakage current [14]. A fast circuit simulation technique based on the latency insertion method (LIM) is proposed in [15] for the electro-thermal analysis of circuits and high-performance systems.…”