Practical Parallel Nesting for Software Transactional Memory

Proceedings of the 23rd International Conference on Parallel Architectures and Compilation

Rodrigues

2014

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Over the last years Transactional Memory (TM) gained growing popularity as a simpler, attractive alternative to classic lock-based synchronization schemes. Recently, the TM landscape has been profoundly changed by the integration of Hardware TM (HTM) in Intel commodity processors, raising a number of questions on the future of TM.We seek answers to these questions by conducting the largest study on TM to date, comparing different locking techniques, hardware and software TMs, as well as different combinations of these mechanisms, from the dual perspective of performance and power consumption.Our study sheds a mix of light and shadows on currently available commodity HTM: on one hand, we identify workloads in which HTM clearly outperforms any alternative synchronization mechanism; on the other hand, we show that current HTM implementations suffer of restrictions that narrow the scope in which these can be more effective than state of the art software solutions. Thanks to the results of our study, we identify a number of compelling research problems in the areas of TM design, compilers and self-tuning.

Section: Related Workmentioning

confidence: 99%

Virtues and limitations of commodity hardware transactional memory

Proceedings of the 23rd International Conference on Parallel Architectures and Compilation

Rodrigues

2014

Self Cite

“…An interesting strategy in STMs has been to reduce spurious aborts only for readonly transactions. This idea has been formally characterized as mv-permissiveness [Perelman et al 2010], and has been used in both single-versioned [Attiya and Hillel 2011] and multiversioned [Diegues and Cachopo 2013;Lu and Scott 2013;Perelman et al 2011] TM algorithms. Here, we seek to reduce spurious aborts even further than mv-permissiveness.…”

Section: Related Workmentioning

confidence: 99%

Time-Warp

ACM Trans. Parallel Comput.

2015

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The multicore revolution that took place one decade ago has turned parallel programming into a major concern for the mainstream software development industry. In this context, Transactional Memory (TM) has emerged as a simpler and attractive alternative to that of lock-based synchronization, whose complexity and error-proneness are widely recognized.The notion of permissiveness in TM translates to only aborting a transaction when it cannot be accepted in any history that guarantees a target correctness criterion. This theoretically powerful property is often neglected by state-of-the-art TMs because it imposes considerable algorithmic costs. Instead, these TMs opt to maximize their implementation's efficiency by aborting transactions under overly conservative conditions. As a result, they risk rejecting a significant number of safe executions.In this article, we seek to identify a sweet spot between permissiveness and efficiency by introducing the Time-Warp Multiversion (TWM) algorithm. TWM is based on the key idea of allowing an update transaction that has performed stale reads (i.e., missed the writes of concurrently committed transactions) to be serialized by "committing it in the past," which we call a time-warp commit. At its core, TWM uses a novel, lightweight validation mechanism with little computational overhead. TWM also guarantees that read-only transactions can never be aborted. Further, TWM guarantees Virtual World Consistency, a safety property that is deemed as particularly relevant in the context of TM.We demonstrate the practicality of this approach through an extensive experimental study: we compare TWM with five other TMs, representative of typical alternative design choices, and on a wide variety of benchmarks. This study shows an average performance improvement across all considered workloads and TMs of 65% in high concurrency scenarios, with gains extending up to 9× with the most favorable benchmarks. These results are a consequence of TWM's ability to achieve drastic reduction of aborts in scenarios of nonminimal contention, while introducing little overhead (approximately 10%) in worst-case, synthetically designed scenarios (i.e., no contention or contention patterns that cannot be optimized using TWM).

“…An interesting strategy in STMs has been to reduce spurious aborts only for read-only transactions. This idea has been formally characterized as mv-permissiveness [26], and has been used in both single-versioned [3] and multi-versioned [11,22,27] TM algorithms. Here, we seek to reduce spurious aborts even further than mv-permissiveness.…”

Section: Related Workmentioning

confidence: 99%

Time-warp

Proceedings of the 19th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming

2014

Self Cite

The notion of permissiveness in Transactional Memory (TM) translates to only aborting a transaction when it cannot be accepted in any history that guarantees correctness criterion. This property is neglected by most TMs, which, in order to maximize implementation's efficiency, resort to aborting transactions under overly conservative conditions.In this paper we seek to identify a sweet spot between permissiveness and efficiency by introducing the Time-Warp Multi-version algorithm (TWM). TWM is based on the key idea of allowing an update transaction that has performed stale reads (i.e., missed the writes of concurrently committed transactions) to be serialized by "committing it in the past", which we call a time-warp commit. At its core, TWM uses a novel, lightweight validation mechanism with little computational overheads. TWM also guarantees that readonly transactions can never be aborted. Further, TWM guarantees Virtual World Consistency, a safety property that is deemed as particularly relevant in the context of TM. We demonstrate the practicality of this approach through an extensive experimental study, where we compare TWM with four other TMs, and show an average performance improvement of 65% in high concurrency scenarios.