Precise Patterning of Large‐Scale TFT Arrays Based on Solution‐Processed Oxide Semiconductors: A Comparative Study of Additive and Subtractive Approaches

Li, Minmin; Zheng, Jiwen; Xu, Huihua; Wang, Zhaogui; Wu, Qian; Huang, Bolong; Zhou, Hang; Liu, Chuan

doi:10.1002/admi.201700981

Cited by 26 publications

(14 citation statements)

References 37 publications

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“…Sputtering, atomic layer deposition, and evaporation techniques have been developed as representative vacuum deposition methods, and the sol–gel technique is continuously being studied for solution‐based processes. [ 35–38 ] In this section, we introduce the representative oxide semiconductor deposition methods, sputtering process, and sol–gel process.…”

Section: Fundamental Principle Of Metal Oxide Phototransistorsmentioning

confidence: 99%

A Review of Phototransistors Using Metal Oxide Semiconductors: Research Progress and Future Directions

et al. 2021

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Metal oxide thin‐film transistors have been continuously researched and mass‐produced in the display industry. However, their phototransistors are still in their infancy. In particular, utilizing metal oxide semiconductors as phototransistors is difficult because of the limited light absorption wavelength range and persistent photocurrent (PPC) phenomenon. Numerous studies have attempted to improve the detectable light wavelength range and the PPC phenomenon. Here, recent studies on metal oxide phototransistors are reviewed, which have improved the range of light wavelengths and the PPC phenomenon by introducing an absorption layer of oxide or non‐oxide hybrid structure. The materials of the absorption layer applied to absorb long‐wavelength light are classified into oxides, chalcogenides, organic materials, perovskites, and nanodots. Finally, next‐generation convergence studies combined with other research fields are introduced and future research directions are detailed.

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Section: Fundamental Principle Of Metal Oxide Phototransistorsmentioning

confidence: 99%

A Review of Phototransistors Using Metal Oxide Semiconductors: Research Progress and Future Directions

et al. 2021

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“…The preparation of the conductive circuits is one of the most important steps in printed electronics industry, such as PCBs, FPCs, RFID tags, sensors, printed batteries, etc., where low circuit resistance, large area, high production efficiency, and low cost are needed. − Subtractive process is the traditional way to prepare conductive circuits in which the metal-clad substrate is first masked by photoresist via photolithography followed by etching the exposed metal to keep the designed conductive patterns . Obviously, the subtractive process is wasteful in material, harmful to the environment, and limited in line width and substrates .…”

Section: Introductionmentioning

confidence: 99%

Additive Preparation of Conductive Circuit Based on Template Transfer Process Using a Reusable Photoresist

Zhu

Tang

Jin

et al. 2020

ACS Appl. Mater. Interfaces

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To solve the problems of a conventional subtractive process for preparing conductive circuits, numerous alternative additive processes have been investigated, such as screen or inkjet printing, selective electroless plating, laser-induced forward transfer, etc. They all lead to a simpler procedure, less pollution, and finer line width but are still faced with difficulties like low conductivity and thickness, poor adhesion, and high cost. PDMS is a kind of material with low surface energy, leading to low adhesion with adhesive. Under these circumstances, a simple template transfer process for additively preparing conductive circuits is reported. The process to form the template includes the preparation of a photolithographic mask on the carrier copper foil and adsorption of PDMS anti-adhesion coating. Followed by metal deposition through electroplating on the template, the conductive circuits are transferred to the target substrate. Thus, the designed conductive circuits on various substrates including paper and cloth are formed. The template can be used again after being reimmersed into PDMS anti-adhesion coating. The components and the concentration of the coating are carefully discussed, and the mechanism of anti-adhesion is also researched by EIS and XPS. The copper circuits show a line width of 10 μm, a peeling strength of 7.11 N/cm, and a resistivity of 1.93 μΩ·cm, which is similar to that of bulk copper. With low pollution and cost, high versatility, and good electrical and adhesion performance, the template transfer process shows a good application prospect in the large-scale production of flexible electronics like sensors, RFID tags, etc.

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“…Developing novel patterning methods to fabricate nano and micro combined structures and employing them in diverse technological fields have received much attentions owing to the expectation that technological breakthroughs can be achieved . As is well known in literature, nanostructures exhibit unique properties such as plasmonic effects, antireflection, structural color, super‐hydrophobicity, adhesion, superior catalytic activity, and charge transport .…”

Section: Introductionmentioning

confidence: 99%

Multiscale Hierarchical Patterning by Sacrificial Layer‐Assisted Creep Lithography

Jang

Choi

Shin

et al. 2019

Adv Materials Inter

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to the expectation that technological breakthroughs can be achieved. [1][2][3] As is well known in literature, nanostructures exhibit unique properties such as plasmonic effects, [4] antireflection, [5] structural color, [6] super-hydrophobicity, [7] adhesion, [8] superior catalytic activity, [9] and charge transport. [10] Microstructures lend mechanical properties (e.g., stress-strain relationship, hardness, and flexibility) [7] to the system and enable the control of light, liquid, and gas pathways. [11][12][13][14] By utilizing these intriguing properties of each nanoand microstructures simultaneously, multi scale hierarchical structures can provide multifunctional effects to the system and maximize their function without the need for any further physicochemical processes. Thus, there have been many attempts to use multiscale hierarchical structures in diverse fields and applications, including micro/nanofluidics, [15] wearable devices, [16] optical devices, [17,18] and energy systems [19,20] with various materials including polymers, metals, and ceramics. [21,22] Our recent study showed that multiscale hierarchical structure can be simply and easily fabricated with the aid of creep behavior of a polymer, [23] which is a permanent deformation of the material due to the viscoelastic behavior of the polymer under long-term stress below the glass transition temperature. In this work, nanostructures were first carved onto polymer films by hot-embossing nanoimprint lithography (NIL) and then followed by a second imprinting with a micropattern mold using the creep deformation characteristic of the polymer film. This facile multiscale patterning method does not require any sophisticated process and equipment. Further, by using Nafion as a substrate that has a low modulus (≈250 MPa) and large creep deformation property, [24,25] we can use diverse polymeric molds instead of metallic molds that require very high pressures for conformal contact with the substrate. However, this method had a weakness that previously carved nanostructures also inevitably underwent creep deformation during the second imprinting process, which led to deformation of the original morphologies of the nanostructures.To address this issue, we introduced a poly(methyl methacrylate) (PMMA) sacrificial layer to protect the preformed structures before the secondary creep-based imprinting process. The PMMA sacrificial layer has a larger modulus (≈3 GPa) [26] The capability to fabricate various multiscale structures without limitations of size, morphology, and number of hierarchies via a simple process is highly desired in modern research. This work reports a powerful multiscalepatterning method called sacrificial layer-assisted creep lithography (SCL). Multiscale structures are successfully obtained by introducing a sacrificial layer, which has low creep compliance and preferential solubility in a nonpolar solvent, on a Nafion film during an additional creep-based imprinting process. Through this method, deformation or geometrical loss of preformed st...

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Precise Patterning of Large‐Scale TFT Arrays Based on Solution‐Processed Oxide Semiconductors: A Comparative Study of Additive and Subtractive Approaches

Cited by 26 publications

References 37 publications

A Review of Phototransistors Using Metal Oxide Semiconductors: Research Progress and Future Directions

A Review of Phototransistors Using Metal Oxide Semiconductors: Research Progress and Future Directions

Additive Preparation of Conductive Circuit Based on Template Transfer Process Using a Reusable Photoresist

Multiscale Hierarchical Patterning by Sacrificial Layer‐Assisted Creep Lithography

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