Precision of bit slicing with in-memory computing based on analog phase-change memory crossbars

Gallo, Manuel Le; Nandakumar, S. R.; Ciric, Lazar; Boybat, Irem; Khaddam-Aljameh, Riduan; Mackin, Charles; Sebastian, Abu

doi:10.1088/2634-4386/ac4fb7

Cited by 25 publications

(9 citation statements)

References 37 publications

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“…5 shows results obtained with one device per polarity in the unit-cell. However, using two devices per polarity can be beneficial because it increases the signal-to-noise ratio (SNR) [8]. When using two devices, we program the first device to either SET or RESET state and run GDP on the other (Fig.…”

Section: Resultsmentioning

confidence: 99%

Gradient descent-based programming of analog in-memory computing cores

Büchel

Vasilopoulos

Kersting

et al. 2022

2022 International Electron Devices Meeting (IEDM)

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The precise programming of crossbar arrays of unit-cells is crucial for obtaining high matrix-vectormultiplication (MVM) accuracy in analog in-memory computing (AIMC) cores. We propose a radically different approach based on directly minimizing the MVM error using gradient descent with synthetic random input data. Our method significantly reduces the MVM error compared with conventional unit-cell by unit-cell iterative programming. It also eliminates the need for high-resolution analog-to-digital converters (ADCs) to read the small unit-cell conductance during programming. Our method improves the experimental inference accuracy of ResNet-9 implemented on two phasechange memory (PCM)-based AIMC cores by 1.26%.

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Section: Resultsmentioning

confidence: 99%

Gradient descent-based programming of analog in-memory computing cores

Büchel

Vasilopoulos

Kersting

et al. 2022

2022 International Electron Devices Meeting (IEDM)

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“…over time, due to the local recombination of oxygen vacancies and structural relaxation of the material, respectively 36,37 .…”

Section: Filamentary Memristor and Phase-change Memory As Normal Dist...mentioning

confidence: 99%

Bringing uncertainty quantification to the extreme-edge with memristor-based Bayesian neural networks

Bonnet

Hirtzlin

Majumdar

et al. 2023

Preprint

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Safety-critical sensory processing applications, like medical diagnosis, require making accurate decisions based on a small amount of noisy input data. For these applications, using Bayesian neural networks, able to quantify the uncertainty of the predictions, is a superior approach to using conventional artificial neural networks. However, because of the probabilistic nature of Bayesian neural networks, they can be computationally intensive to use for inference stage and thus not well suited for extreme-edge applications. An emerging idea to solve this problem is to use the intrinsic probabilistic nature of memristors to efficiently implement Bayesian neural network inference: the variability in the resistance of memristors would represent the probability distribution of weights in Bayesian neural networks. However, when using memristors, statistical effects follow the laws of device physics, whereas in Bayesian neural networks, those effects can take on arbitrary shapes. In this work, we overcome this difficulty by adopting a dedicated synapse architecture based on two memristors, and by training Bayesian neural networks with a dedicated variational inference technique that includes a “technological loss” to take into account specificities of memristor physics. This technique allowed us to program a two-layer Bayesian neural network on 75 physical crossbar arrays of 1,024 memristors, incorporating CMOS periphery circuitry to do in-memory computing, to classify arrhythmia in electrocardiograms. Our experimental neural network classified heartbeats with high accuracy, and estimated the certainty of its predictions. In the case of uncertain predictions, it differentiated between ambivalent heartbeats (aleatoric uncertainty), and heartbeats with never-seen patterns (epistemic uncertainty). We show that our technique can also be used with phase change memories, by employing a different “technological loss” term. The great advantage of this approach is its low energy consumption: we estimate an 800 times improvement in energy efficiency compared to a GPU performing the same task.

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“…The SNN can be implemented in a resistive crossbar network (RCN) fashion using a memristor composed of CMOS or ferroelectric devices to store synaptic weights [21,24,25,[52][53][54]56]. Multi-level analog weights have been implemented using a memristor [52,53,61]. The SNN model could be mapped directly using the physical characteristics of nano-scale transistors and memristive devices instead of artificial digital emulation, providing significant energy savings compared to the digital implementations [51,58].…”

Section: Mixed Implementationmentioning

confidence: 99%

Acoustic scene analysis using analog spiking neural network

Mukhopadhyay

Naligala

Duggisetty

et al. 2022

Neuromorph. Comput. Eng.

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Sensor nodes in a wireless sensor network (WSN) for security surveillance applications should preferably be small, energy-efficient, and inexpensive with in-sensor computational abilities. An appropriate data processing scheme in the sensor node reduces the power dissipation of the transceiver through the compression of information to be communicated. This study attempted a simulation-based analysis of human footstep sound classification in natural surroundings using simple time-domain features. The spiking neural network (SNN), a computationally low-weight classifier derived from an artificial neural network (ANN), was used to classify acoustic sounds. The SNN and required feature extraction schemes are amenable to low-power subthreshold analog implementation. The results show that all analog implementations of the proposed SNN scheme achieve significant power savings over the digital implementation of the same computing scheme and other conventional digital architectures using frequency-domain feature extraction and ANN-based classification. The algorithm is tolerant of the impact of process variations, which are inevitable in analog design, owing to the approximate nature of the data processing involved in such applications. Although SNN provides low-power operation at the algorithm level, ANN to SNN conversion leads to an unavoidable loss of classification accuracy of ~5%. We exploited the low-power operation of the analog processing SNN module by applying redundancy and majority voting, which improved the classification accuracy, taking it close to the ANN model.

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Precision of bit slicing with in-memory computing based on analog phase-change memory crossbars

Cited by 25 publications

References 37 publications

Gradient descent-based programming of analog in-memory computing cores

Gradient descent-based programming of analog in-memory computing cores

Bringing uncertainty quantification to the extreme-edge with memristor-based Bayesian neural networks

Acoustic scene analysis using analog spiking neural network

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