Precision Time Protocol support hardware for ATCA control and data acquisition system

Abstract

h i g h l i g h t s• ATCA based control and data acquisition subsystem has been developed at IPFN.• PTP and time stamping were implemented with VHDL and PTP daemon (PTPd) codes.• The RTM (. . .) provides PTP synchronization with an external GMC.• The main advantage is that timestamps are generated closer to the Physical Layer at the GMII.• IPFN's upgrade consistently exhibited jitter values below 25 ns RMS. a r t i c l e i n f o . The TCN infrastructure was tested for an RMS jitter under the limit of 50 ns. Therefore, IPFN's hardware, namely the ATCA-PTSW-AMC4 hub-module, which is in charge of timing and synchronization distribution for all subsystem endpoints, shall also perform within this jitter limit. This paper describes a relevant upgrade, applied to the ATCA-PTSW-AMC4 hardware, to comply with these requirements -in particular, the integration of an add-on module "RMC-TMG-1588" on its Rear Transition Module (RTM). This add-on is based on a commercial FPGA-based module from Trenz Electronic, using the ZHAW "PTP VHDL code for timestamping unit and clock", which features clock offset and drift correction and hardware-assisted time stamping. The main advantage is that timestamps are generated closer to the Physical Layer, at the Gigabit Ethernet Media Independent Interface (GMII), avoiding the timing uncertainties accumulated through the upper layers. PTP code and user software run in a MicroBlaze TM soft-core CPU with Linux in the same FPGA, adding programmability and quick implementation of the desired features and upgrades. The paper briefly presents an overview of the ATCA C&DAQ, presenting the PTP and time stamping solution and how it was hardware-implemented, resulting in the RMC-TMG-1588 module. Finally it will describe the synchronization performance tests and results obtained at ITER site as well as indicating further developments to the system, in order to fulfil ITER's requirements.