Predict and Write: Using K-Means Clustering to Extend the Lifetime of NVM Storage

Kargar, Saeed; Litz, Heiner; Nawab, Faisal

doi:10.1109/icde51399.2021.00072

Cited by 12 publications

(16 citation statements)

References 27 publications

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“…Nevertheless, many recent studies have shown that although this might be true to some extent, it does not mean that this problem is solved altogether [8,[10][11][12][13][14]. For example, there is no information on the type of data sets that are used to get to these results.…”

Section: Write Endurancementioning

confidence: 99%

“…For instance, based on an experiment conducted by [17], when the number of different bits in the write data and the overwritten content varies from 0% to 100%, the energy consumption can vary from nearly 0 to over 10000 pJ. So, targeting bit flip reduction is a worthy investment in the NVM context, and there are a large body of research, such as [8,[10][11][12][13][14][17][18][19], targeting bit flip reduction to extend the NVM lifetime and decrease their energy consumption.…”

Section: Energy Consumptionmentioning

confidence: 99%

“…(2) In the second way, writing similar contents decreases the number of NVM line writes, respectively cache lines needed to be written per item. For example, suppose that the page size in a system is 4KB as shown in Figure . 1 [11]. In this scenario, if the items are similar to each other in terms of the hamming distance, fewer number of cache lines are needed to fulfill the request (suppose each part in Figure . 5 is a cache line).…”

Section: Latencymentioning

confidence: 99%

“…Other approaches built on RBW to increase write endurance by masking or changing the value to be written if it Fig. 5 An example of replacing a memory content with a similar content used in PNW [11] leads to reducing bit flips [22][23][24][25][26]. Flip-N-Write (FNW), for example, checks whether flipping the bits of the write operation would lead to decreasing the number of bit flips [22].…”

Section: Solutionsmentioning

confidence: 99%

“…Although reducing write amplification is a promising way to extend the NVMs' lifespan, it does not necessarily lead to the best opportunities to reduce bit flipping and increasing write endurance [8,11]. This is because-unlike flash-NVM cells are written individually, which means that the number of flipped bits is more important to optimize than the number of written words [8].…”

Section: Bit Flip Reductionmentioning

confidence: 99%

See 4 more Smart Citations

Challenges and future directions for Energy, Latency, and Lifetime Improvements in NVMs

Kargar

Nawab

2022

Preprint

Self Cite

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Recently, Non-Volatile Memory (NVM) technology has revolutionized the landscape of memory systems. With many advantages, such as non volatility and near zero standby power consumption, these byte-addressable memory technologies are taking the place of DRAMs. Nonetheless, they also present some limitations, such as limited write endurance, which hinders their widespread use in today’s systems. Furthermore, adjusting current data management systems to embrace these new memory technologies and all their potential is proving to be a nontrivial task. Because of this, a substantial amount of research has been done, from both the database community and the storage systems community, that tries to improve various aspects of NVMs to integrate these technologies into the memory hierarchy. In this tutorial we survey state-of-the-art work on deploying NVMs in database and storage systems communities and the ways their limitations are being handled within these communities. In particular, we focus on the challenges that are related to high energy consumption, low write endurance and extending the lifetime of NVM devices.

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Section: Write Endurancementioning

confidence: 99%

Section: Energy Consumptionmentioning

confidence: 99%

Section: Latencymentioning

confidence: 99%

Section: Solutionsmentioning

confidence: 99%

Section: Bit Flip Reductionmentioning

confidence: 99%

See 3 more Smart Citations

Challenges and future directions for Energy, Latency, and Lifetime Improvements in NVMs

Kargar

Nawab

2022

Preprint

Self Cite

View full text Add to dashboard Cite

show abstract

Challenges and future directions for energy, latency, and lifetime improvements in NVMs

Kargar

Nawab

2022

Distrib Parallel Databases

Self Cite

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Recently, non-volatile memory (NVM) technology has revolutionized the landscape of memory systems. With many advantages, such as non volatility and near zero standby power consumption, these byte-addressable memory technologies are taking the place of DRAMs. Nonetheless, they also present some limitations, such as limited write endurance, which hinders their widespread use in today’s systems. Furthermore, adjusting current data management systems to embrace these new memory technologies and all their potential is proving to be a nontrivial task. Because of this, a substantial amount of research has been done, from both the database community and the storage systems community, that tries to improve various aspects of NVMs to integrate these technologies into the memory hierarchy. In this work, which is the extended version of Kargar and Nawab (Proc. VLDB Endowment 14(12):3194–3197, 2021), we explore state-of-the-art work on deploying NVMs in database and storage systems communities and the ways their limitations are being handled within these communities. In particular, we focus on (1) the challenges that are related to high energy consumption, low write endurance and asymmetric read/write costs and (2) how these challenges can be solved using hardware and software solutions, especially by reducing the number of bit flips in write operations. We believe that this area has not gained enough attention in the data management community and this tutorial will provide information on how to integrate recent advances from the NVM storage community into existing and future data management systems.

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Mitigating Write Disturbance in Non-Volatile Memory via Coupling Machine Learning with Out-of-Place Updates

Wu,

Shen,

Yang

et al. 2024

2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)

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Predict and Write: Using K-Means Clustering to Extend the Lifetime of NVM Storage

Cited by 12 publications

References 27 publications

Challenges and future directions for Energy, Latency, and Lifetime Improvements in NVMs

Challenges and future directions for Energy, Latency, and Lifetime Improvements in NVMs

Challenges and future directions for energy, latency, and lifetime improvements in NVMs

Mitigating Write Disturbance in Non-Volatile Memory via Coupling Machine Learning with Out-of-Place Updates

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