Predicting Wafer-Level Package Reliability Life Using Mixed Supervised and Unsupervised Machine Learning Algorithms

Abstract

With the increasing demand for electronic products, the electronic package gradually developed toward miniaturization and high density. The most significant advantage of the Wafer-Level Package (WLP) is that it can effectively reduce the volume and footprint area of the package. An important issue in the design of WLP is how to quickly and accurately predict the reliability life under the accelerated thermal cycling test (ATCT). If the simulation approach is not adopted, it usually takes several ACTCs to design a WLP, and each ACTC will take several months to get the reliability life results, which increases development time considerably. However, simulation results may differ depending on the designer’s domain knowledge, ability, and experience. This shortcoming can be overcome with artificial intelligence (AI). In this study, finite element analysis (FEA) is combined with machine learning algorithms, e.g., Kernel Ridge Regression (KRR), to create an AI model for predicting the reliability life of electronic packaging. Kernel Ridge Regression (KRR) combined with the K-means cluster algorithm provides a highly accurate and efficient way to obtain AI models for large-scale data sets.

Construction of prediction models for novel subtypes in patients with arteriosclerosis obliterans undergoing endovascular therapy: an unsupervised machine learning study

“…Establishing accurate subtyping and risk prediction enables precision medicine approaches for these complex, heterogeneous diseases. Compared to supervised machine learning and traditional predictive modeling approaches, UMLA excels in uncovering hidden patterns and structures within the data without prior labeling [17]. This is particularly advantageous in medical research where the complexity and variability of clinical data often mask underlying patterns that could be crucial for patient stratification and outcome prediction.…”

Effective Macroscopic Thermomechanical Characterization of Multilayer Circuit Laminates for Advanced Electronic Packaging

“…These challenges have further driven the industry to shift from SoC to heterogeneous system integration and scaling with advanced packaging, such as system-in-package (SiP) and system-on-package (SoP). These heterogeneous integration (HI) packaging solutions enable the integration of advanced packages [1,2], chips/chiplets [3], passive devices, and functional electronic components from various manufacturers with diversified manufacturing processes into a single package or module. They offer compelling efficiency, durability, flexibility, increased function density, and a more reasonable development and design cost, as well as good electrical performance, yield improvement, intellectual property reusability, and even miniaturization.…”

“…In addition, they play a dominant and essential role in the thermomechanical behavior of the electronic assemblies, driven by the mismatch between temperature and the coefficient of thermal expansion (CTE) among the constituent materials. Presently, many studies have been carried out to assess the thermal performance, reliability, and warpage of various laminate substrate-based IC packages and assemblies (see, e.g., [1][2][3][4]7,9,10,13]). Normally, this can be achieved using direct detailed finite element analysis (DD-FEA).…”