Predictive-delay control based on real-time feedback scheduling

Sahraoui, Zakaria; Grolleau, Emmanuel; Mehdi, Driss; Mohamed, Azah; Labed, Abdenour

doi:10.1016/j.simpat.2016.02.013

Cited by 7 publications

(12 citation statements)

References 10 publications

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“…As a result, we are only able to determine an expected value. This conclusion is drawn from earlier work, 14 which tested this technique using a range of Lresp delay values. The impaired control, caused mainly by this delay, was successfully improved in all examinations with various Lresp.…”

Section: Codesign Of the Control Task Model Within The Feedback Sched...mentioning

confidence: 53%

“…Nevertheless, the WCRT is different from the actual response time of the current job. It is also experimented in Zakaria et al, 14 that is, at instant t k , the last response time (known value) Lresp ( t k − 1 ) can be used instead of the actual Lresp and give similar results.…”

Section: Codesign Of the Control Task Model Within The Feedback Sched...mentioning

confidence: 96%

“…In what follows, the predicted delay control solution shown in Figure 1 and proposed in Zakaria et al 14 is presented. We calculate the control u i ( k ) using y i ( t k + Lres p i ( k ) ) rather than y i ( t k + L s i ( k ) ) .…”

Section: Predicted Pid Calculationmentioning

confidence: 99%

“…Moreover, rescaling parameters according to resources using FBS is not the unique solution against artifacts impact. Recently, in Zakaria et al, 14 the latency was estimated and used to predict the system output to enhance the control. Section 2 completes the state of the art about FBS solutions.…”

Section: Introductionmentioning

confidence: 99%

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A PID controller based on the processor utilization artifact within a real-time multitask control system

Sahraoui

2023

Proceedings of the Institution of Mechanical Engineers, Part I:

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Codesign of control and scheduling systems is commonly used in the literature to address scheduling artifacts such as latencies and jitters. However, As controllers’ designs remain unchanged and fail to express any concerns regarding this matter, it becomes challenging to quantify the quality of control and its trade-off with resource utilization while adapting control or scheduling settings at runtime. In the present article, we propose a new proportional–integral–derivative (PID) controller design for the problem of scheduling artifacts. Based on our prior work, the latency processor utilization is revealed as a hidden artifact for the control deterioration when developing new predicted PID controller terms. This artifact effect is proven analytically using a codesign task model and considering an extrapolated measurement. The effectiveness of the proposed solution is assessed with a benchmark system and compared with previous works.

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Section: Codesign Of the Control Task Model Within The Feedback Sched...mentioning

confidence: 53%

Section: Codesign Of the Control Task Model Within The Feedback Sched...mentioning

confidence: 96%

Section: Predicted Pid Calculationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A PID controller based on the processor utilization artifact within a real-time multitask control system

Sahraoui

2023

Proceedings of the Institution of Mechanical Engineers, Part I:

Self Cite

View full text Add to dashboard Cite

show abstract

“…Another co-design approach is considered in [54]. The authors get feedback of delay and jitter in the execution of tasks from the scheduler and feed it to the control applications.…”

Section: Related Workmentioning

confidence: 99%