Principles and construction of MSD adder in ternary optical computer

Abstract

The two remarkable features of ternary values and a massive unit with thousands bits of parallel computation will make the ternary optical computer (TOC) with modified signed-digit (MSD) adder more powerful and efficient than ever before for numerical calculations. Based on the decrease-radix design presented previously, a TOC can satisfy either a user requiring huge capacity for data calculations or one with a moderate amount of data, if it is equipped with a prepared adder. Furthermore, with the application of pipelined operations and the proposed data editing technique, the efficiency of the prepared adder can be greatly improved, so that each calculated result can be obtained almost within one clock cycle. It is hopeful that by employing a MSD adder, users will be able to enter a new dimension with the creation of a new multiplier, new divider, as well as new matrix operator in a TOC in the near future.With the current rapid increase in the complexity of computer architectures, the power consumption of large scale systems has risen prohibitively. Much attention has been focused on reducing the power consumption in different ways. One of the ways of solving the problem is to use of an optical computer with its special non-electron characteristics of high speed, parallelism, multi-valued, and low power consumption. Considering these properties, researchers have been focusing mainly on improving the operating speed [1-3] and enlarging the number of parallel bits in these computers [4][5][6], but have often neglected the problem of reducing the power consumption.A TOC prototype recently developed in our laboratory at Shanghai University is a typical optical computer with a huge number of data bits [6,7]. Based on the decrease-radix design proposed in 2008 [8], we can configure any number of bits as specific groups of tri-valued logic units at any time in the TOC. However, as thousands of bits exist in an adder, the ripple-carry technique is infeasible in a TOC because of the terrible carry delay. In addition, the look-ahead carry technique does not suit the construction of optical elements due to the high complexity of its tree type architecture. For these reasons, we proposed a new technique called the direct parallel carry channel (DPCC) aiming at accelerating the carry operation [9]. Unfortunately, this scheme has failed to be put into practice for various reasons.

Error control on spectral data of four‐wave mixing based on a‐SiC technology

“…In Fig. 4, under front irradiation, d 1 and d 2 have similar values making difficult the decoding; however under back irradiation their recognition is obvious. So, from the front and back information the different bit sequences were decoded and the signal demultiplexed [9].…”

“…Digital optical systems and optical processors demand an all-optical arithmetic unit to perform different optical arithmetic operations. Various architectures, logical and/or arithmetic operations have been proposed in optical/optoelectronic computing [1][2][3][4]. Effort has been given to the development of all-optical logical functions [5] by using different schemes like optoelectronic devices based on optical nonlinear micro-ring resonators [6,7].…”

Principle and design of ternary optical accumulator implementing M-k-B addition

“…24 Peng et al proposed a structure and implementing method for optical MSD adder from the view of application. 25 But the MSD adder is essentially three-step.…”

Principles, structures, and implementation of reconfigurable ternary optical processors

“…Based on this theory, Li et al [3,4] explored the implementation of vector matrix multiplication algorithms on TOCs; Teng et al [5] proposed algorithms for implementing high-performance cellular automata and random number generators on TOCs; and Shen et al [6] discussed novel methods for solving NP-hard problems. In 2010, in light of the difficulties in constructing a parallel through carry adder [7] and the advantages of avoiding carry propagation when using modified signed digit (MSD) addition, Jin et al [8] implemented an MSD adder based on the decrease-radix design theory and proposed data editing and arithmetic pipelining techniques. All this technical progress calls for the invention of a ternary optical processor (TOP) that can handle a large…”