Pro-Active Policing and Policy Enforcement Architecture for Securing MPSoCs

Abstract

Embedded multiprocessor system-on-chip (MPSoC) architectures allow implementation of mixed critical applications and provide security mechanisms to segregate and protect system resources such as ARM TrustZone. These architectures enforce strict security measures right from the powering on of the system, to prevent misuse and compromise. However, such security measures have been found vulnerable where security design practices are not considered or are poorly implemented, particularly at software and hardware stack boundaries. Also, the embedded solutions developed using these MPSoC platforms are vulnerable to single points of failure and do not contain active response or mitigations for circumstances where a compromise occurs. This paper proposes pro-active hardware based policing and policy enforcement approach, along with system architecture and its hardware components, to this research problem. The architecture is physically isolated from the rich computing resources which actively monitors communications of system resources on the ARM AMBA-AXI4 bus. It detects anomalous system behaviours such as policy violation or compromised bus communication responses, and responds with predefined active countermeasures, such as deletion of secret data or disabling of the device to tackle security vulnerabilities and attacks at runtime. This proposed solution complements existing embedded hardware and software security technologies and provides an additional layer of hardware security when a vulnerability is found and exploited. This contribution lends itself to the principle of least privilege, implemented in software-based access control solutions like SELinux to mitigate when other protections have failed. This paper presents a proof-of-concept work supported by preliminary synthesis results on Xilinx Zynq-7000 and Ultra-Scale+ MPSoC chips.

Evolution of Embedded Platform Security Technologies: Past, Present & Future Challenges

“…The evolution of embedded security platform architecture has been guided by technological advancements and a cause and effect of developing application requirements and design challenges [3], [12], [13], [15]. This includes the realisation of mix-critical applications, broader network connectivity, a need for code/data protection, isolation and segregation of resources leading to wider availability of embedded multiprocessing [6], [7], [9]. Where these computing platform advancements brought benefits, they have exposed platforms to wide-range security challenges due to increased system attack surface and micro-architecture vulnerabilities [12], [16], [17], [18], [19], [20], [21], [22].…”

“…This need for compliance has triggered a chain reaction among service providers, original equipment manufacturers and embedded platform manufacturers and posed them to design, develop and integrate platform defence mechanisms [4], [6], [7]. These defence mechanisms can facilitate designing detect, respond and recover functions in case of malicious activity, software malfunction or adversarial attack [3], [4], [8], [9]. Since such incidents cause severe damage to the business reputation and safety of their users, the need for strong and robust platform security has become an obligatory design and operational security requirement for nextgeneration intelligent embedded technologies [3], [2], [10].…”

“…These technological advancements have guided the evolution of both new computing paradigms, threats, attacks vectors and security architectures to meet the diverse security requirements [12], [13]. In response, novel defence and security mechanisms have been incrementally introduced into security architectures, to strengthen security perimeter and reduce attack surface [2], [6], [9], [14], while maintaining data confidentiality, integrity and availability of digital services.…”

Enhancing Security and Privacy of Next-Generation Edge Computing Technologies

“…A detailed SoC platform architecture [29], [30] and security modelling approach [31] that realises the proposed characteristics and embedded security requirements has been defined and implemented.…”

Establishing Cyber Resilience in Embedded Systems for Securing Next-Generation Critical Infrastructure

“…A detailed System-on-Chip (SoC) platform architec-ture [28], [35] and security modelling approach [25] that realises the proposed embedded microarchitectural characteristics of a cyber resilient embedded system have been published.…”