Procedural analog design (PAD) tool

Stefanović, D.; Kayal, Maher; Pastre, Marc; Litovski, Vančo

doi:10.1109/isqed.2003.1194751

Cited by 14 publications

(4 citation statements)

References 7 publications

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“…Procedural layout generators date back to as early as the works of ILAC [1] and SLAM [21] . ILAC layout engine uses a pro-cedural block layout generator, which supports a wide variety of circuit substructures such as current mirror, differential pair, interdigit resistance, capacitance.…”

Section: Procedural Layout Generationmentioning

confidence: 99%

Challenges and opportunities toward fully automated analog layout design

et al. 2020

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Realizing the layouts of analog/mixed-signal (AMS) integrated circuits (ICs) is a complicated task due to the high design flexibility and sensitive circuit performance. Compared with the advancements of digital IC layout automation, analog IC layout design is still heavily manual, which leads to a more time-consuming and error-prone process. In recent years, significant progress has been made in automated analog layout design with emerging of several open-source frameworks. This paper firstly reviews the existing state-of-the art AMS layout synthesis frameworks with focus on the different approaches and their individual challenges. We then present recent research trends and opportunities in the field. Finally, we summaries the paper with open questions and future directions for fully-automating the analog IC layout.

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Section: Procedural Layout Generationmentioning

confidence: 99%

Challenges and opportunities toward fully automated analog layout design

et al. 2020

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“…The main principle behind the design mode is splitting the circuit into its constituent building blocks and designing each block separately [3]. However, there must be a pre-defined order for block design.…”

Section: Design Modementioning

confidence: 99%

“…Such tools do not offer complete automatic solutions. Rather, they do help the designer during the design cycle by offering insight and allowing decision-taking based on more solid understanding of existing tradeoffs [2] [3]. The proposed TOAIC tool (Tradeoffs of Analog Integrated Circuits) adopts the second approach for automation.…”

Section: Introductionmentioning

confidence: 99%

Web-based analog design using tradeoff charts

Hamza

Philip

Ali

et al. 2012

2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)

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This paper presents a web-based analog design assistant. The tool focuses on the design of basic analog building blocks through Figure-of-Merits (FOM) defined for each block. FOMs are analyzed through tradeoff charts. The tool provides more insight into block operation and assists the designer achieving a better design. Circuits can then be automatically decomposed to its building blocks and imported into the proposed environment. A two-stage Miller amplifier example is shown to demonstrate the design flow.

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“…Several works, such as [8], [9], [10] and [11], target the automation of the layout generation of analog circuits.…”

Section: ) the Shallow Trench Isolation (Sti)mentioning

confidence: 99%

A Python-based layout-aware analog design methodology for nanometric technologies

Youssef

Javid

Dupuis

et al. 2011

2011 IEEE 6th International Design and Test Workshop (IDT)

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Abstract-This paper presents a methodology for procedural layout-aware design for nanometric technologies. A Python-based layout generation tool generates different layout styles for the same basic analog building blocks. Moreover, layout dependent parasitic parameters such as stress effects are easily computed and compared for different layout styles. The procedural layout description is written using a Python API that ensures layout portability over different technologies. A main focus is on how the layout generation tool addresses both geometric and parasiticaware electrical synthesis. This is made possible through an internal loop that links circularly both the sizing phase and the layout generation phase. The proposed design methodology assists the analog designer in exploring electrical and physical trade-offs. At the end, we present synthesis and characterization results that prove the effectiveness and speed of the proposed methodology.

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Procedural analog design (PAD) tool

Abstract: This paper presents a new

Cited by 14 publications

References 7 publications

Challenges and opportunities toward fully automated analog layout design

Challenges and opportunities toward fully automated analog layout design

Web-based analog design using tradeoff charts

A Python-based layout-aware analog design methodology for nanometric technologies

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