Process Optimization for Flexible Printed Circuit Board Assembly Manufacturing

Abstract

A number of surface mount technology (SMT) process variables including land design are considered for minimizing tombstone defect in flexible printed circuit assembly in high volume manufacturing. As SMT chip components have been reduced over the past years with their weights in milligrams, the torque that once helped self-centering of chips, gears to tombstone defects. In this paper, we have investigated the correlation of the assembly process variables with respect to the tombstone defect by employing statistically designed experiment. After the statistical analysis is performed, we have setup hypotheses for the root causes of tombstone defect and derived main effects and interactions of the process parameters affecting the hypothesis. Based on the designed experiments, statistical analysis was performed to investigate significant process variable for the purpose of process control in flexible printed circuit manufacturing area. Finally, we provide beneficial suggestions for find-pitch PCB design, screen printing process, chip-mounting process, and reflow process to minimize the tombstone defects.

Thermo‐mechanical properties of epoxy composites filled with inorganic particulate fillers for robust solder mask application

“…5 With the emergence of high-density interconnect boards and more stringent requirements on PCBs, good thermo-mechanical attributes of SM are ubiquitous as the SM experiences harsh conditions in the PCB manufacturing and assembly process, such as routing/cutting or drilling operations. [6][7][8][9] During these operations, the stresses produced are transmitted to the SM in the form of viscoelastic strain based on the tan ⊐ of the SM. [10][11][12][13] Due to the intrinsic brittleness of the epoxy composite materials in SMs, [14][15][16] it is crucial to have a good filler-epoxy interaction so that the SM exhibits more elastic response when subjected to the above-mentioned mechanical processes to safeguard the electrical insulation of the non-conductive portions of the PCB.…”