Process window impact of progressive mask defects, its inspection and disposition techniques (go/no-go criteria) via a lithographic detector

Huang, Jerry; Peng, Lan-Hsin; Chu, Chia‐Chi; Bhattacharyya, Kaustuve; Eynon, Ben; Mirzaagha, Farzin; DiBiase, Tony; Son, Kong; Cheng, Jackie; Chen, Ellison; Wang, Den

doi:10.1117/12.632039

Cited by 4 publications

(1 citation statement)

References 2 publications

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“…Lithographical significance judgment is based on guidelines deduced from lithographical experience. However, new functions such as Litho3 TM that take into account MEEF and defect criticality [4], were not evaluated in this work. -Reduced S/N for Line/Space patterns on test wafers because of low image contrast and high line edge roughness (LER) -S/N is much lower on product wafers due to previous layer influences.…”

Section: Direct Reticle Inspectionmentioning

confidence: 98%

Wafer fab mask qualification techniques and limitations

Poock¹,

Maelzer²,

Spence³

et al. 2006

SPIE Proceedings

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Mask inspection and qualification is a must for wafer fabs to ensure and guarantee high and stable yields. Single defect events can easily cause a million dollar loss through a defect duplicating onto the wafer.Several techniques and methods for mask qualification within a wafer fab are known but not all of them are neither used nor understood regarding their limitations. Increasing effort on existing tool platforms is necessary to detect the defects of interest which are at the limit of the tools specification -On the other hand next generation tools are very sensitive and therefore consume only a negligible amount of time for recipe optimization. Knowing the limits of each inspection tool helps to balance between effort and benefit.Masks with programmed defects of 90nm and 65nm design rule were used in order to compare the different available inspection techniques. During the course of this technical work, the authors concentrate mainly on two inspection techniques. The first one inspects the reticle itself using KLA-Tencor's SLF27 (TeraStar) and SL536 (TeraScan) tools. As the reticle gets inspected itself this is the so called "direct" mask defect inspection. The second inspection technique discussed is the "indirect" mask defect inspection which consists of printing the pattern on a blank wafer and use KLA-Tencor's bright-field wafer inspection tool (2xxx series) to inspect the wafer. Data of this work will include description of the techniques, inspection results, defect maps, sensitivity analysis, effort estimation as well as limitations for both techniques for the used design rule.KEY WORDS: mask defects, mask inspection, wafer inspection, disposition, limitations, lithography BACKGROUNDThere are significant needs for mask inspection in wafer fabs. Although many of the masks will remain problem free (clean) even after large number of exposures, previous publications from other fabs indicated that on an average, about 1% of binary masks (using at 365nm lithography) and 6 to 15% of EPSMs (using DUV lithography) show a defect growth problem over time of their usage in the fabs [1] [2]. Goal should be to identify these masks ahead of time by periodic monitoring and prevent them from production use before the defects reach the critical level.There are two techniques that are commonly used for mask monitoring in wafer fabs. Direct reticle inspection:a. STARlight TM b. Die to Die Transmitted light (ddT) c. Die to Die Reflected light (ddR) 2. Indirect reticle inspection, generally known as image qualification: This can be achieved via printing a wafer using the mask in question followed by inspection of that printed wafer. Two types of wafers can be used for this inspection: a. Test wafer: mask is printed on a test wafer (resist coated bare Si wafer)

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Section: Direct Reticle Inspectionmentioning

confidence: 98%

Wafer fab mask qualification techniques and limitations

Poock¹,

Maelzer²,

Spence³

et al. 2006

SPIE Proceedings

Self Cite

View full text Add to dashboard Cite

show abstract

Results from a new die-to-database reticle inspection platform

et al. 2007

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A new die-to-database high-resolution reticle defect inspection system has been developed for the 45nm logic node and extendable to the 32nm node (also the comparable memory nodes). These nodes will use predominantly 193nm immersion lithography although EUV may also be used. According to recent surveys, the predominant reticle types for the 45nm node are 6% simple tri-tone and COG. Other advanced reticle types may also be used for these nodes including: dark field alternating, Mask Enhancer, complex tri-tone, high transmission, CPL, EUV, etc. Finally, aggressive model based OPC will typically be used which will include many small structures such as jogs, serifs, and SRAF (sub-resolution assist features) with accompanying very small gaps between adjacent structures. The current generation of inspection systems is inadequate to meet these requirements. The architecture and performance of a new die-to-database inspection system is described. This new system is designed to inspect the aforementioned reticle types in die-to-database and die-to-die modes. Recent results from internal testing of the prototype systems are shown. The results include standard programmed defect test reticles and advanced 45nm and 32nm node reticles from industry sources. The results show high sensitivity and low false detections being achieved.

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Field results from a new die-to-database reticle inspection platform

Broadbent

Yokoyama²,

et al. 2007

SPIE Proceedings

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Process window impact of progressive mask defects, its inspection and disposition techniques (go/no-go criteria) via a lithographic detector

Cited by 4 publications

References 2 publications

Wafer fab mask qualification techniques and limitations

Wafer fab mask qualification techniques and limitations

Results from a new die-to-database reticle inspection platform

Field results from a new die-to-database reticle inspection platform

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