Processor array architectures for deep packet classification

Abstract

This paper presents a systematic technique for expressing a string search algorithm as a regular iterative expression to explore all possible processor arrays for deep packet classification. The computation domain of the algorithm is obtained and three affine scheduling functions are presented. The technique allows some of the algorithm variables to be pipelined while others are broadcast over system-wide buses. Nine possible processor array structures are obtained and analyzed in terms of speed, area, power, and I/O timing requirements. Time complexities are derived analytically and through extensive numerical simulations. The proposed designs exhibit optimum speed and area complexities. The processor arrays are compared with previously derived processor arrays for the string matching problem.

Architectural Implications of Cache Coherence Protocols with Network Applications on Chip MultiProcessors

“…Indeed, as predicted by Gilder's law, Internet traffic has continued doubling every year since 1997 [1]. Further, emerging network applications such as QoS, URL matching, virus detection, intrusion detection, and load balancing require deep packet classification processing [2] and security-related processing. The emerging deep packet classification processing and security-related processing are more computation-intensive than all other network applications [3].…”

Architectural Support for Network Applications on Simultaneous MultiThreading Processors

“…One of the main problems is deep packet classification processing which is a major performance-critical function and is required in network applications such as QoS, URL matching, virus detection, intrusion detection, and load balancing [6]. Another is security-related processing which has become quite essential for Web switches and servers.…”

Performing Packet Content Inspection by Longest Prefix Matching Technology

“…Since the pattern lengths in the layer-2 address lookup are the same (48/64 bits), binary searching, hashing, and CAM/TCAM are the common techniques to apply [4]. Although various researches focus on performing a single pattern search in parallel, they are not suitable for modern network environments [5] [6]. This is because the deep packet inspection requires multiple-pattern matching with variable length patterns.…”