Profiling a warehouse-scale computer

Kanev, Svilen; Darago, Juan Pablo; Hazelwood, Kim; Ranganathan, Parthasarathy; Moseley, Tipp; Wei, Gu-Yeon; Brooks, David

doi:10.1145/2749469.2750392

Cited by 303 publications

(112 citation statements)

References 42 publications

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“…A very slight correlation was also found between the Fourier parameters and the O-C values, suggesting that the O-C variations (up to 30 min) might be due to instabilities in the light curve shape. This correlation was strengthened by the analysis of the Kepler measurements up to Q17 [4].…”

Section: Cepheidsmentioning

confidence: 91%

The star RR Lyr and the Cepheid variables in the era of the space photometry revolution

Poretti

Borgne

Klotz

2015

EPJ Web of Conferences

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Abstract. The long-term behaviours of the pulsation and Blazhko periods of RR Lyr are investigated by means of Kepler and ground-based observations. The difficulties in detecting additional modes in the Cepheids monitored with CoRoT are discussed. RR LyrRR Lyr≡KIC7198959 was included in the field-of-view of the Kepler space telescope [2] and highprecision, continuous observations could be secured. Well before the launch of Kepler, we decided to devise small, autonomous, and transportable photometric instruments to make the ground-based survey of the modulations in amplitude and phase (Blazhko effect) of RR Lyr as effective as possible. The instruments are composed of a commercial equatorial mount (Sky-Watcher HEQ5 Pro Goto), an AUDINE CCD camera (512x768 kaf400 chip) and a photographic 135-mm focal, f/2.8 lens with a field of view of 2 • x3 • (Fig. 1). We gave them the nickname VTTs for "Very Tiny Telescopes".The GEOS (Groupe Européen d'Observations Stellaires) RR Lyr database [5] is continuously updated by inserting all the published maxima of RR Lyr variables. RR Lyr itself is among them 1 . Therefore, we could analyse [6] all the observed maxima since 1899 in order to have a clear picture of the behaviours of the pulsation period P 0 and of the Blazhko effect, noticed since 1916. We could identify two states defined as pulsation over a "long" primary period (P 0 >0.56684 d) and over a "short" one (P 0 <0.56682 d). These states alternate with intervals of 13-16 yr, and are well defined since 1943. We also provided homogeneous determinations of the Blazhko period P B in several time intervals and we studied how it changed while the two states alternated. We could clearly establish how the Blazhko period had just one sudden decrease from 40.8 d to 39.0 d in 1975. The variations of the pulsation and Blazhko periods are completely decoupled (Fig. 2).Moreover, the combination of Kepler and VTT data recorded the vanishing of the Blazhko effect. The space telescope continuously monitored the monotonic long-term decrease, proving that smallscale modulations, lasting from 2 to 4 P B , are also visible in the O-C (observed minus calculated times of maximum brightness) values. The VTT data are now securing the RR Lyr monitoring after that Kepler had to be pointed in another direction. In particular, Fig. 2 Article available at

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Section: Cepheidsmentioning

confidence: 91%

The star RR Lyr and the Cepheid variables in the era of the space photometry revolution

Poretti

Borgne

Klotz

2015

EPJ Web of Conferences

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“…Solutions include instrumenting the stack prologue and epilogue to keep track of the current stack through a series of bits stored in a register [12,13,29]. However, overheads of this approach are ≈6% and higher, exceeding all the time spent in memory allocation [31]. We solve these problems by using stack height and object size for per-site prediction and cache lookups.…”

Section: Lifetime Prediction Challengesmentioning

confidence: 99%

“…Overheads. Continuous profiling in deployment is not practical because it adds 6% overhead [13,42], which can be more than memory allocation itself [31].…”

Section: Introductionmentioning

confidence: 99%

Learning-based Memory Allocation for C++ Server Workloads

Maas

Andersen

Isard

et al. 2020

Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Syste

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Modern C++ servers have memory footprints that vary widely over time, causing persistent heap fragmentation of up to 2× from long-lived objects allocated during peak memory usage. This fragmentation is exacerbated by the use of huge (2MB) pages, a requirement for high performance on large heap sizes. Reducing fragmentation automatically is challenging because C++ memory managers cannot move objects.This paper presents a new approach to huge page fragmentation. It combines modern machine learning techniques with a novel memory manager (Llama) that manages the heap based on object lifetimes and huge pages (divided into blocks and lines). A neural network-based language model predicts lifetime classes using symbolized calling contexts. The model learns context-sensitive per-allocation site lifetimes from previous runs, generalizes over different binary versions, and extrapolates from samples to unobserved calling contexts. Instead of size classes, Llama's heap is organized by lifetime classes that are dynamically adjusted based on observed behavior at a block granularity.Llama reduces memory fragmentation by up to 78% while only using huge pages on several production servers. We address ML-specific questions such as tolerating mispredictions and amortizing expensive predictions across application execution. Although our results focus on memory allocation, the questions we identify apply to other system-level problems with strict latency and resource requirements where machine learning could be applied.

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“…As memory latency is a critical performance determinant for datacenter workloads [25,39], the dramatic increase in AMAT caused by replacing DRAM with SCM will directly manifest itself in endto-end performance degradation. Therefore, we begin by asking the question: by how much will performance degrade from simply replacing the memory?…”

Section: Workload Compatibility With Scmmentioning

confidence: 99%

“…Emerging storage-class memory (SCM) technologies are a prime candidate to serve as the next generation of main memory, as they boast approximately an order of magnitude greater density than DRAM at a lower cost per bit [31,64,78,90]. These traits come at the price of elevated access latency compared to DRAM, creating new challenges for systems designers as memory latency is a critical factor in datacenter application performance [39]. Given that typical SCM latencies are 4-100× greater than DRAM [69,77], and that SCM devices often have write latencies 2-10× longer than reads, naïvely and completely replacing DRAM with SCM is an unacceptable compromise for datacenter operators.…”

Section: Introductionmentioning

confidence: 99%

Design guidelines for high-performance SCM hierarchies

Ustiugov¹,

Daglis²,

Picorel

et al. 2018

Proceedings of the International Symposium on Memory Systems

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With emerging storage-class memory (SCM) nearing commercialization, there is evidence that it will deliver the much-anticipated high density and access latencies within only a few factors of DRAM. Nevertheless, the latency-sensitive nature of memory-resident services makes seamless integration of SCM in servers questionable. In this paper, we ask the question of how best to introduce SCM for such servers to improve overall performance/cost over existing DRAM-only architectures. We first show that even with the most optimistic latency projections for SCM, the higher memory access latency results in prohibitive performance degradation. However, we find that deployment of a modestly sized high-bandwidth 3D stacked DRAM cache makes the performance of an SCM-mostly memory system competitive. The high degree of spatial locality that memory-resident services exhibit not only simplifies the DRAM cache's design as page-based, but also enables the amortization of increased SCM access latencies and the mitigation of SCM's read/write latency disparity.We identify the set of memory hierarchy design parameters that plays a key role in the performance and cost of a memory system combining an SCM technology and a 3D stacked DRAM cache. We then introduce a methodology to drive provisioning for each of these design parameters under a target performance/cost goal. Finally, we use our methodology to derive concrete results for specific SCM technologies. With PCM as a case study, we show that a two bits/cell technology hits the performance/cost sweet spot, reducing the memory subsystem cost by 40% while keeping performance within 3% of the best performing DRAM-only system, whereas single-level and triple-level cell organizations are impractical for use as memory replacements.• Information systems → Storage class memory; Cloud based storage; • Hardware → Memory and dense storage; KEYWORDS Storage-class memory, heterogeneous memory hierarchy, 3D stacked DRAM ACM Reference Format:

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Profiling a warehouse-scale computer

Cited by 303 publications

References 42 publications

The star RR Lyr and the Cepheid variables in the era of the space photometry revolution

The star RR Lyr and the Cepheid variables in the era of the space photometry revolution

Learning-based Memory Allocation for C++ Server Workloads

Design guidelines for high-performance SCM hierarchies

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