Progress in SiC MOSFET Reliability

Abstract

Bias-temperature stress experiments performed on two generations of SiC power MOSFETs from the same manufacturer show reductions in threshold voltage (V T ) shift at elevated temperatures from first-to second-generation. The negative V T shift is reduced from a range of -1 V to -1.6 V to a range of -100 mV to -300 mV for temperatures from 125°C to 175°C. Plastic-packaged parts show a gate-bias-independent junction leakage current at temperatures above the rated temperature, suggesting that the plastic packaging introduces an extrinsic leakage path. Junction leakage in metal-packaged parts can be significantly reduced by applying a small negative gate bias at elevated temperatures. Switching gate bias temperature stresses show V T shifts dependent on duty cycle, with a higher duty cycle resulting in a higher rate of V T shift. Cumulative damage effects may be observed between switching gate bias stresses.

Performance and Reliability Characterization of 1200 V Silicon Carbide Power MOSFETs and JFETs at High Temperatures

“…Previous investigations into SiC MOSFET V T stability as a function of elevated operational temperatures and gate bias stresses (both static and dynamic) have shown monotonic changes in V T due to both of these variables, independent of packaging type [7]. At elevated temperature, the surface potential under strong inversion is reduced along with the concentration of interface traps that must be charged or discharged to achieve that potential [8].…”