Projected Mushroom Type Phase‐Change Memory

Abstract

Phase-change memory devices have found applications in in-memory computing where the physical attributes of these devices are exploited to compute in places without the need to shuttle data between memory and processing units. However, nonidealities such as temporal variations in the electrical resistance have a detrimental impact on the achievable computational precision. To address this, a promising approach is projecting the phase configuration of phase change material onto some stable element within the device. Here, the projection mechanism in a prominent phase-change memory device architecture, namely mushroom-type phase-change memory, is investigated. Using nanoscale projected Ge 2 Sb 2 Te 5 devices, the key attributes of state-dependent resistance, drift coefficients, and phase configurations are studied, and using them how these devices fundamentally work is understood.

Graphite Carbon-Doped Sb2Te Nanostructures for Phase-Change Memory Applications

“…Figure 4 shows XRR results of the C 34 (Sb 2 Te) 66 film, and the corresponding Bragg fitting is obtained according to the formula 51 (1) where α is the radian value of the incident angle, δ is related to the scatter, m is the order of reflection, Δm is a 1/2 or 0 (1/2 in our calculation), and λ is the wavelength. The following relationship gives the film thickness t (2) where k is the slope. The density change is calculated by the equation (3) Here, ρ mc and ρ ma represent the density of the film, and α cc 2 and α ca 2 denote critical angles of the XRR.…”

“…Chalcogenide-based nanomaterials exhibit a reversible phase transition and form the basis of devices including phase-change memory (PCM), chalcogenide memristors, electro-optic mixed devices, optical storage devices, and neuromorphic devices. − The chalcogenide Ge 2 Sb 2 Te 5 (GST) has been intensely studied experimentally and theoretically. However, the unsatisfactory thermal stability and data retention, slow crystallization speed and operation speed (∼50 ns), large density change upon phase transition, resistance drift, etc.…”

Unveiling the Effect of Superlattice Interfaces and Intermixing on Phase Change Memory Performance

“…Benchmarking of reset current density ( J reset ) and resistance drift coefficient ( v ) for various PCM technologies. Simultaneously low J reset and low v are achieved in our SL-PCM (with 2/1.8 nm/nm Sb 2 Te 3 /GST and 32 internal interfaces), approaching the most desirable corner on this plot, compared to other PCM technologies from the literature. ,,− (The best corner is defined by the region where both J reset and v are simultaneously low.) SL-PCMs and control GST in this work are shown with red stars and red circle, respectively.…”

“…This establishes the importance of SL material optimization and interface control (e.g., choice of SL material layers, their period thickness, suitable deposition conditions, and methods) for next-generation, low-power and high-density SL-PCM technology. The benchmarking plot in Figure also highlights the advantages of superlattice-based PCM technology compared to other existing PCM technologies ,− ,, in reducing PCM switching current and resistance drift simultaneously.…”

Fabrication of stable multi-level resistance states in a Nb-doped Ge2Sb2Te5 device

“…6 Phase-change memory (PCM) is an active area in nonvolatile memory devices. 7,8 It is based on rapid and reversible phase changes and is accompanied with electrical and optical switches. PCMs may be suitable for neuro-inspired computing systems because of their low energy consumption and multilevel states.…”