Proceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation 2020
DOI: 10.1145/3385412.3386010
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Promising 2.0: global optimizations in relaxed memory concurrency

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Cited by 35 publications
(26 citation statements)
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“…Both have a pair of accesses (o r , o w ∈ {rel, acq, rlx}) to the same location -a read followed by a write. Following [22], FADD(x, v) stores the value of x into a register $r, and adds v to x, while CAS(x, v 1 , v 2 ) compares an expected value v 1 to the value in x, and if the values are same, sets the value of x to v 2 . The old value of x is then stored in $r.…”
Section: Preliminariesmentioning
confidence: 99%
See 3 more Smart Citations
“…Both have a pair of accesses (o r , o w ∈ {rel, acq, rlx}) to the same location -a read followed by a write. Following [22], FADD(x, v) stores the value of x into a register $r, and adds v to x, while CAS(x, v 1 , v 2 ) compares an expected value v 1 to the value in x, and if the values are same, sets the value of x to v 2 . The old value of x is then stored in $r.…”
Section: Preliminariesmentioning
confidence: 99%
“…In this section, we recall the promising semantics [22]. We present here PS 2.0 with three memory accesses, relaxed, release writes (rel) and acquire reads (acq).…”
Section: The Promising Semanticsmentioning
confidence: 99%
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“…For various hardware memory models, operational semantics are also used [34]- [36]. Some recent works about the "promising" semantics [36], [37] propose a relatively more economical way to eliminate the "thin-air-read" problem without sacrificing too many possible optimisations. Its usefulness has been demonstrated in the formalisation of the ARMv8 memory model [38].…”
Section: Related Workmentioning
confidence: 99%