Promotion of ESD-CDM Immunity in Dicing Saw Process

Abstract

Polyimide (PI) dielectric as a heatproof material is popularly adopted in integrated circuit (IC) industry. In assembly dicing saw process, the de-ionized (D.I.) water shows the higher resistance and rubs with PI material. Therefore, the negative electrostatic charges are generated and accumulated to gate oxide capacitor or p-n junction capacitor in IC chips. Because the discharge path is isolated in this time, the sufficiently cumulative charges will damage the IC devices in this process step. These damaged ICs demonstrate the function fail. To overcome this failure mechanism, an adequate amount of CO2 gas flow and some suitable control of water pressure were studied. Through this effort, the final-test yield in sub-micron or deep-submicron analog power complementary metal-oxide-semiconductor (CMOS) ICs was impressively promoted from 80% to 98%.