Prophet/Critic Hybrid Branch Prediction

Falcón, Ayose; Stark, Jared; Ramírez, Alex; Lai, Konrad; Valero, Mateo

doi:10.1145/1028176.1006722

Cited by 21 publications

(18 citation statements)

References 30 publications

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“…Currently, simulating only the SPECint applications on a cycle-accurate simulator requires many CPU hours. A recent branch prediction study published in part by researchers from Intel used 110 different benchmarks [11]. Many researchers, particularly at smaller institutions without significant simulation resources, simply could not complete enough simulations for a meaningful mi- Hardware gshare gskewed path-neural Budget (KB) INT FP MM SERV INT FP MM SERV INT FP MM SERV 1 7 11 8 2 7 10 8 4 S M S S 2 10 12 9 3 11 11 9 5 S L S S 4 11 13 8 4 12 12 9 8 M L S S 8 13 15 9 8 13 13 12 9 L L M S 16 14 16 14 10 14 14 14 12 L L M S 32 16 17 16 12 15 15 15 15 L L L M 64 18 18 15 15 16 16 15 15 L L L M 128 18 18 16 16 17 17 15 15 L L L L Table 3.…”

Section: Discussionmentioning

confidence: 99%

“…There are a large number of other candidate algorithms that we could have chosen [6,10,16,20,21,24,26,27,[29][30][31], many of which were not considered because they use non-branch information [32], profile information [5,7], timing information [11], or were similar to other predictors already included in the study [9]. The goal is not to conduct an exhaustive comparison of all predictors ever proposed; branch prediction merely serves as a vehicle to conduct comparisons between simulation infrastructures.…”

Section: Simulated Branch Predictorsmentioning

confidence: 99%

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Simulation Differences Between Academia and Industry: A Branch Prediction Case Study

Loh

2005

IEEE International Symposium on Performance Analysis of Systems and Software, 2005. ISPASS 2005.

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Computer architecture research in academia and industry is heavily reliant on simulation studies. While microprocessor companies have the resources to develop highly detailed simulation infrastructures that they correlate against their own silicon, academic researchers tend to use free, widely available simulators. The differences in instruction set architectures, operating systems, simulator models and benchmarks create a disconnect between academic and industrial research studies. This paper presents a comparative study to find correlations and differences between the same microarchitecture study conducted in two different frameworks. Due to the limited availability of industrial simulation frameworks, this research is limited to a case study of branch predictors. Encouragingly, our simulations indicate that several recently proposed branch predictors behave similarly in both environments when evaluated with the SPECcpu benchmark suite. Unfortunately, we also present results that show that conclusions drawn from studies based on SPECcpu do not necessarily hold when other applications are considered.

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Section: Discussionmentioning

confidence: 99%

Section: Simulated Branch Predictorsmentioning

confidence: 99%

Simulation Differences Between Academia and Industry: A Branch Prediction Case Study

Loh

2005

IEEE International Symposium on Performance Analysis of Systems and Software, 2005. ISPASS 2005.

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“…The filter part is exemplified by Sentry Table Filter [1], yet conceptually other filter methods, such as PPD [17] or NBD [25] can also be applied. The hedging part (Hedge State Machine) can adopt Complementary Branch Prediction (CBP) [18] [19] or other methods, such as the Prophet/Critic Hybrid Branch Prediction [15] [16]. In this paper, the hedging part is embodied by CBP.…”

Section: A Hedging Filter Hfmentioning

confidence: 99%

Cost-effective branch prediction by combining hedging and filtering

Maa

Yen

Kuo

et al. 2010

2010 International Computer Symposium (ICS2010)

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With the ever increasing needs of power aware architecture and circuit design in recent years, how to reduce the power consumption of processors without sacrificing performance has become an important issue. In this paper, we propose a new method for low power branch predictionHedging Filter, which combines filtering scheme reducing dynamic power consumption with hedging prediction mechanism lowering static power dissipation. We analyze and empirically study this proposed scheme embodied in the Sentry Table-Complementary Branch Prediction combo with respect to critical path delay, performance, hardware overhead and power consumption. Hedging Filter not only preserves critical path delay and prediction accuracy, but also contributes to the savings of dynamic and static power. From our evaluation, presuming equivalent or superior performance with respect to traditional counterparts, the proposed method reduces branch prediction hardware cost by up to 71% and power saving by up to 79% respectively.

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“…Intel includes the perceptron predictor in one of its IA-64 simulators for researching future microarchitectures [3]. Falcón et al use a perceptron predictor as a component of a prophet/critic hybrid predictor that runs the branch predictor ahead to second-guess previous predictions and possibly reverse them [7].…”

Section: Research Related To Neural Branch Predictionmentioning

confidence: 99%

Piecewise Linear Branch Prediction

Jiménez

2005

SIGARCH Comput. Archit. News

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Improved branch prediction accuracy is essential to sustaining instruction throughput with today's deep pipelines. We introduce piecewise linear branch prediction, an idealized branch predictor that develops a set of linear functions, one for each program path to the branch to be predicted, that separate predicted taken from predicted not taken branches. Taken together, all of these linear functions form a piecewise linear decision surface. We present a limit study of this predictor showing its potential to greatly improve predictor accuracy.We then introduce a practical implementable branch predictor based on piecewise linear branch prediction. In making our predictor practical, we show how a parameterized version of it unifies the previously distinct concepts of perceptron prediction and path-based neural prediction. Our new branch predictor has implementation costs comparable to current prominent predictors in the literature while significantly improving accuracy. For a deeply pipelined simulated microarchitecture our predictor with a 256KB hardware budget improves the harmonic mean normalized instructions-per-cycle rate by 8% over both the original path-based neural predictor and 2Bc-gskew. The average misprediction rate is decreased by 16% over the path-based neural predictor and by 22% over 2Bc-gskew.

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Prophet/Critic Hybrid Branch Prediction

Abstract: Abstract

Cited by 21 publications

References 30 publications

Simulation Differences Between Academia and Industry: A Branch Prediction Case Study

Simulation Differences Between Academia and Industry: A Branch Prediction Case Study

Cost-effective branch prediction by combining hedging and filtering

Piecewise Linear Branch Prediction

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