Protecting GPU's Microarchitectural Vulnerabilities via Effective Selective Hardening

Condia, Josie E. Rodriguez; Rech, Paolo; Santos, Fernando Fernandes dos; Carrot, Luigi; Reorda, M. Sonza

doi:10.1109/iolts52814.2021.9486703

Cited by 4 publications

(2 citation statements)

References 28 publications

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“…Several previous works focused on analyzing the impact of faults on conventional CPUs with limited scalability into GPUs due to their high hardware complexity and the intrinsic software parallelism. This paper extends our preliminary work [14], in which we introduced a method to identify critical sites in a GPU and evaluated the effectiveness of selectively protecting them via TMR. In this paper, we generalize and extend the method to identify architectural vulnerability sites (critical flip-flops) in any module of a GPU affected by transient faults.…”

mentioning

confidence: 69%

An Effective Method to Identify Microarchitectural Vulnerabilities in GPUs

Condia

Rech

Santos

et al. 2022

IEEE Trans. Device Mater. Relib.

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Graphics Processing Units (GPUs) are increasingly adopted in several domains where reliability is fundamental, such as self-driving cars and autonomous systems. Unfortunately, GPU devices have been shown to have a high error rate, while the constraints imposed by real-time safety-critical applications make traditional (and costly) replication-based hardening solutions inadequate.This work proposes an effective methodology to identify the architectural vulnerable sites in GPUs modules, i.e. the locations that, if corrupted, most affect the correct instructions execution. We first identify, through an innovative method based on Register-Transfer Level (RTL) fault injection experiments, the architectural vulnerabilities of a GPU model. Then, we mitigate the fault impact via selective hardening applied to the flip-flops that have been identified as critical. We evaluate three hardening strategies: Triple Modular Redundancy (TMR), Triple Modular Redundancy against SETs (∆TMR), and Dual Interlocked Storage Cells (Dice flip-flops). The results gathered on a publicly available GPU Model (FlexGripPlus) considering functional units, pipeline registers, and warp scheduler controller show that our method can tolerate from 85% to 99% of faults in the pipeline registers, from 50% to 100% of faults in the functional units and up to 10% of faults in the warp scheduler, with a reduced hardware overhead (in the range of 58 % to 94% when compared with traditional TMR).Finally, we adapt the methodology to perform a complementary evaluation targeting permanent faults and identify critical sites prone to propagate fault effects across the GPU. We found that a considerable percentage (65% to 98%) of flip-flops that are critical for transient faults are also critical for permanent faults.

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mentioning

confidence: 69%

An Effective Method to Identify Microarchitectural Vulnerabilities in GPUs

Condia

Rech

Santos

et al. 2022

IEEE Trans. Device Mater. Relib.

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“…The impact of tensor cores and mixed precision on the reliability of matrix multiplication in a high performance GPU is studied in [27]. Effective microarchitectural selective hardening of GPU modules to mitigate errors that affect the correct execution of instructions is proposed in [28].…”

Section: Related Workmentioning

confidence: 99%

Comparative Analysis of Soft-Error Sensitivity in LU Decomposition Algorithms on Diverse GPUs

Leon,

Badia,

Belloch

et al. 2023

Preprint

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Graphics Processing Units (GPUs) have become integral to embedded systems and supercomputing centers due to their large memory, cutting-edge technology and high performace per watt. However, their susceptibility to transient errors necessitates a comprehensive analysis of error sensitivity, as well as the development of error mitigation techniques and fault-tolerant algorithms. This study focuses on evaluating the soft-error sensitivity of two distinct versions of LU decomposition algorithms implemented two on very different GPUs—a low-power SoC embedded GPU and a high-performance massively parallel GPU.Through extensive fault injection campaigns on both GPUs, we examine the vulnerability of the algorithms, identify error causes, and determine critical code components requiring enhanced protection. The experiments reveal that most single bit flip fault injections in the instruction results lead to erroneous outcomes or unrecoverable errors. Notably, efficient GPU resource utilization can increase the number of masked errors, thereby enhancing error resilience. Additionally, while different parts of the code exhibit similar error occurrence types and rates, the propagation of errors to elements within the result matrix differs significantly.

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Comparative analysis of soft-error sensitivity in LU decomposition algorithms on diverse GPUs

Leon,

Badia,

Belloch

et al. 2024

J Supercomput

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Graphics processing units (GPUs) have become integral to embedded systems and supercomputing centres due to their large memory, cutting-edge technology and high performance per watt. However, their susceptibility to transient errors requires a comprehensive analysis of error sensitivity, as well as the development of error mitigation techniques and fault-tolerant algorithms. This study focuses on evaluating the soft-error sensitivity of two distinct versions of LU decomposition algorithms implemented on two very different GPUs—a low-power SoC embedded GPU and a high-performance massively parallel GPU. Through extensive fault injection campaigns on both GPUs, we examine the vulnerability of the algorithms, identify error causes, and determine critical code components requiring enhanced protection. The experiments reveal that most single bit flip fault injections in the instruction results lead to erroneous outcomes or unrecoverable errors. Notably, efficient GPU resource utilisation can increase the number of masked errors, thereby enhancing error resilience. Additionally, while different parts of the code exhibit similar error occurrence types and rates, the propagation of errors to elements within the result matrix differs significantly.

show abstract

Protecting GPU's Microarchitectural Vulnerabilities via Effective Selective Hardening

Cited by 4 publications

References 28 publications

An Effective Method to Identify Microarchitectural Vulnerabilities in GPUs

An Effective Method to Identify Microarchitectural Vulnerabilities in GPUs

Comparative Analysis of Soft-Error Sensitivity in LU Decomposition Algorithms on Diverse GPUs

Comparative analysis of soft-error sensitivity in LU decomposition algorithms on diverse GPUs

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