Protecting Synchronization Mechanisms of Parallel Big Data Kernels via Logging

LeCompte, Travis; Peng, Lü; Yuan, Xu; Tzeng, Nian-Feng

doi:10.1109/tc.2021.3122993

Cited by 1 publication

(1 citation statement)

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“…These would both increase the depth of the final mapped quantum circuit and the number of SWAP gates added. In addition, in 2023, LeCompte et al [32] proposed a qubit allocation algorithm that combined RL and graph neural networks to solve the initial mapping problem in quantum circuit mapping. By providing both the properties of the target backend and the quantum circuit as input to guide the decision-making process, the fidelity of the output circuit could be improved.…”

Section: Introductionmentioning

confidence: 99%

Deep Reinforcement Learning for Mapping Quantum Circuits to 2D Nearest‐Neighbor Architectures

Li,

Liu,

2024

Adv Quantum Tech

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Recently, quantum computing is considered as a promising future computing paradigm. However, when implementing quantum circuits on a quantum device, it is necessary to ensure that quantum circuits satisfy nearest‐neighbor architecture constraints. When performing nearest‐neighbor architecture mapping for quantum circuits, it is inevitable to introduce SWAP gates, which will increase the overhead and reduce the fidelity. Therefore, it is crucial to complete the mapping with the minimum SWAP. In this paper, a 2D nearest‐neighbor architecture mapping method for quantum circuits is proposed based on deep reinforcement learning. In the initial mapping, an isomorphic graph initial mapping search algorithm is designed to quickly find the isomorphic graph between quantum circuit and architecture constraint graph. For quantum circuits without isomorphic graph mapping, the reordering algorithm of qubit impact factors is designed to obtain the initial placement position of qubits. In the SWAP gate addition, a qubit local reordering algorithm based on dueling deep‐Q‐network is designed to reduce SWAP gates. Experiments on the benchmark set B131 and IBM Q20 Tokyo verify that the proposed method can add fewer SWAP gates. Compared with the state‐of‐the‐art method, the average running time is accelerated by 63.1%, and the average SWAP gates added are reduced by 24.7%.

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Section: Introductionmentioning

confidence: 99%